Texas Instruments
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Series List(7161)
| Part | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Signal Buffers, Repeaters, Splitters | 7 | 4 | The SN65LVPE502 is a dual channel, single lane USB 3.0 redriver and signal conditioner supporting data rates of 5.0Gbps. The device complies with USB 3.0 spec revision 1.0, supporting electrical idle condition and low frequency periodic signals (LFPS) for USB 3.0 power management modes. Programmable EQ, De-Emphasis and Amplitude Swing... Read More | |
| Interface | 10 | 1 | The SN65MLVD047 is a quadruple line driver. The output current of this device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the... Read More | |
| Interface | 2 | 1 | The SN65MLVD048 is a quad-channel M-LVDS receiver. This device is designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which is optimized to operate at signaling rates up to 250Mbps. Each receiver channel is controlled by a receive enable ( RE). When RE = low, the corresponding channel is enabled;... Read More | |
| Interface | 4 | 1 | The SN65MLVD080 and SN65MLVD082 provide eight half-duplex transceivers for transmitting and receiving Multipoint-Low-Voltage Differential Signals in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250 Mbps. The driver outputs have been designed to support multipoint buses presenting loads as low as... Read More | |
| Signal Buffers, Repeaters, Splitters | 2 | 1 | The SN65MLVD128 and SN65MLVD129 are LVTTL-to-M.LVDS translators/repeaters. Outputs comply with the M.LVDS standard (TIA/EIA-899) and are optimized for data rates up to 250 Mbps, and clock frequencies up to 125 MHz. The driver outputs have been designed to support multipoint buses presenting loads as low as 30and incorporates controlled transition... Read More | |
| Signal Buffers, Repeaters, Splitters | 2 | 1 | The SN65MLVD128 and SN65MLVD129 are LVTTL-to-M.LVDS translators/repeaters. Outputs comply with the M.LVDS standard (TIA/EIA-899) and are optimized for data rates up to 250 Mbps, and clock frequencies up to 125 MHz. The driver outputs have been designed to support multipoint buses presenting loads as low as 30and incorporates controlled transition... Read More | |
| Interface | 3 | 1 | The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with... Read More | |
| Interface | 4 | 1 | The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with... Read More | |
| Interface | 8 | 1 | High noise immunity 100-Mbps M-LVDS transceiver | |
| Integrated Circuits (ICs) | 7 | 1 | 66AK2G1x is a family of heterogeneous multicore System-on-Chip (SoC) devices based on TI’s field-proven Keystone II (KS2) architecture. These devices address applications that require both DSP and Arm performance, with integration of high-speed peripheral and memory interfaces, hardware acceleration for network and cryptography functions, and high-level operating systems (HLOS) support.... Read More | |
| Integrated Circuits (ICs) | 5 | 1 | The 66AK2Hxx platform combines the quad ARM Cortex-A15 processor with up to eight TMS320C66x high-performance DSPs using the KeyStone II architecture. The 66AK2H14/12/06 device provides up to 5.6 GHz of ARM and 9.6 GHz of DSP processing coupled with security, packet processing, and Ethernet switching at lower power than multichip... Read More | |
Texas Instruments66AK2H14High performance multicore DSP+Arm - 4x Arm A15 cores, 8x C66x DSP cores, 10GbE | Integrated Circuits (ICs) | 2 | 1 | The 66AK2Hxx platform combines the quad ARM Cortex-A15 processor with up to eight TMS320C66x high-performance DSPs using the KeyStone II architecture. The 66AK2H14/12/06 device provides up to 5.6 GHz of ARM and 9.6 GHz of DSP processing coupled with security, packet processing, and Ethernet switching at lower power than multichip... Read More |
| Integrated Circuits (ICs) | 4 | 1 | The 66AK2L06 KeyStone SoC is a member of the C66x family based on TI's new KeyStone II Multicore SoC Architecture and is a low-power solution with integrated JESD204B lanes that meets the more stringent power, size, and cost requirements of applications requiring connectivity with ADC and DAC based applications. The... Read More | |
| Specialty Logic | 2 | 1 | The SN54ABT18504 and SN74ABT18504 scan test devices with 20-bit universal bus transceivers are members of the Texas Instruments SCOPETMtestability IC family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the 4-wire... Read More | |
Texas Instruments6PADC3101Automotive 92-dB SNR low-power stereo ADC with digital microphone support and miniDSP | Integrated Circuits (ICs) | 1 | 1 | The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB,... Read More |
| Multivibrators | 3 | 1 | These multivibrators feature dual negative-transition-triggered inputs and a single positive-transition-triggered input which can be used as an inhibit input. Complementary output pulses are provided. Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt-trigger input circuitry (TTL hysteresis)... Read More | |
| Multivibrators | 1 | 1 | These d-c triggered multivibrators feature output pulse-duration control by three methods. The basic pulse time is programmed by selection of external resistance and capacitance values (see typical application data). The '122 and 'LS122 have internal timing resistors that allow the circuits to be used with only an external capacitor, if... Read More | |
Texas Instruments74ABT16224416-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs | Logic | 6 | 1 | The ’ABT162244 devices are 16-bit buffers and line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide noninverting... Read More |
Texas Instruments74ABT1624016-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs | Logic | 7 | 1 | The 'ABT16240A devices are 16-bit buffers and line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide inverting... Read More |
| Universal Bus Functions | 4 | 1 | These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the... Read More | |