Texas Instruments
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Series List(7161)
| Part | Category | # Parts | Status | Description |
|---|---|---|---|---|
Texas Instruments74ABT16282720-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs | Logic | 6 | 1 | The ’ABT162827A devices are noninverting 20-bit buffers composed of two 10-bit buffers with separate output-enable signals. For either 10-bit buffer, the two output-enable (1OE1\ and 1OE2\, or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the... Read More |
| Logic | 3 | 1 | These 20-bit transparent D-type latches feature noninverting 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ’ABT162841 devices can be used as two 10-bit latches or one 20-bit latch. While... Read More | |
| Logic | 5 | 1 | The 'ABT16373A are 16-bit transparent D-type latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. These devices can be used as two 8-bit latches or one 16-bit latch. When... Read More | |
| Logic | 2 | 1 | The 'ABT16863 are 18-bit noninverting transceivers designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. The 'ABT16863 can be used as two 9-bit transceivers or one 18-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus... Read More | |
| Universal Bus Functions | 3 | 1 | These 18-bit universal bus transceivers consist of storage elements that can operate either as D-type latches or D-type flip-flops to allow data flow in transparent or clocked modes. Data flow in each direction is controlled by output-enable (OEAB and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For... Read More | |
| Universal Bus Functions | 2 | 1 | These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, clocked, and clock-enabled modes. Data flow in each direction is controlled by output-enable (and), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable... Read More | |
| Logic | 3 | 1 | The 'ABT16640 are inverting 16-bit transceivers designed for asynchronous communication between data buses. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the... Read More | |
| Logic | 3 | 1 | These 20-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The 'ABT16821 can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20... Read More | |
| Logic | 5 | 1 | These 18-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The 'ABT16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the... Read More | |
| Logic | 2 | 1 | These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The 'ABT16841 can be used as two 10-bit latches or one 20-bit latch. The 20 transparent D-type latches... Read More | |
| Logic | 3 | 1 | The 'ABT16843 18-bit bus-interface D-type latches are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The 'ABT16843 can be used as two 9-bit latches or one 18-bit latch. The 18 latches are... Read More | |
Texas Instruments74ABT22418-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs | Logic | 5 | 1 | These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT2240, SN74ABT2240A and 'ABT2244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low... Read More |
Texas Instruments74ABT2408-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs | Logic | 10 | 1 | These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT241, SN74ABT241A, SN54ABT244, and SN74ABT244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical... Read More |
Texas Instruments74ABT2418-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs | Logic | 11 | 1 | These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT240, SN74ABT240A, and 'ABT244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low... Read More |
Texas Instruments74ABT2448-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs | Logic | 14 | 1 | These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT240, SN74ABT240A, SN54ABT241, and SN74ABT241A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical... Read More |
| Logic | 11 | 1 | These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used... Read More | |
| Logic | 11 | 1 | These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the SN54ABT374 and SN74ABT374A are edge-triggered D-type flip-flops. On the positive transition of the... Read More | |
| Logic | 10 | 1 | These 8-bit positive-edge-triggered D-type flip-flops with a clock (CLK) input are particularly suitable for implementing buffer and storage registers, shift registers, and pattern generators. Data (D) input information that meets the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the... Read More | |
Texas Instruments74ABT5408-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs | Logic | 6 | 1 | The ’ABT540 octal buffers and line drivers are ideal for driving bus lines or buffer memory address registers. The devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. The 3-state control gate is a 2-input AND gate with active-low inputs so that... Read More |
| Logic | 6 | 1 | The 'ABTH162245 devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from... Read More | |