Catalog(6 parts)
| Part | Output Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Mounting Type | Current - Output High, Low▲▼ | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Number of Bits per Element▲▼ | Number of Elements▲▼ | Supplier Device Package | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Package / Case▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments SN74ABT245BNG4Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-PDIP | 3-State | 85 °C | -40 °C | Through Hole | 0.03200000151991844 A, 0.06400000303983688 A | 20-DIP | 0.007619999814778566 m | 0.007619999814778566 m | 8 ul | 1 ul | 20-PDIP | 5.5 V | 4.5 V | |
Texas Instruments SN74ABT245BPWTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 3-State | 85 °C | -40 °C | Surface Mount | 0.03200000151991844 A, 0.06400000303983688 A | 20-TSSOP | 0.004399999976158142 m | 8 ul | 1 ul | 20-TSSOP | 5.5 V | 4.5 V | 0.004394200164824724 m | |
Texas Instruments SN74ABT245BRGYRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-VQFN (3.5x4.5) | 3-State | 85 °C | -40 °C | Surface Mount | 0.03200000151991844 A, 0.06400000303983688 A | 20-VFQFN Exposed Pad | 8 ul | 1 ul | 20-VQFN (3.5x4.5) | 5.5 V | 4.5 V | |||
Texas Instruments SN74ABT245BDBRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-SSOP | 3-State | 85 °C | -40 °C | Surface Mount | 0.03200000151991844 A, 0.06400000303983688 A | 20-SSOP | 8 ul | 1 ul | 20-SSOP | 5.5 V | 4.5 V | 0.0052999998442828655 m, 0.005308600142598152 m | ||
Texas Instruments SN74ABT245BPWG4Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP | 3-State | 85 °C | -40 °C | Surface Mount | 0.03200000151991844 A, 0.06400000303983688 A | 20-TSSOP | 0.004399999976158142 m | 8 ul | 1 ul | 20-TSSOP | 5.5 V | 4.5 V | 0.004394200164824724 m | |
Texas Instruments SN74ABT245BDGVRTransceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TVSOP | 3-State | 85 °C | -40 °C | Surface Mount | 0.03200000151991844 A, 0.06400000303983688 A | 20-TFSOP | 0.004394200164824724 m | 0.004399999976158142 m | 8 ul | 1 ul | 20-TVSOP | 5.5 V | 4.5 V |
Key Features
• Typical VOLP(Output Ground Bounce)<1 V at VCC= 5 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionHigh-Drive Outputs (–32-mA IOH, 64-mA IOL)Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Typical VOLP(Output Ground Bounce)<1 V at VCC= 5 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionHigh-Drive Outputs (–32-mA IOH, 64-mA IOL)Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)
Description
AI
These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.