Catalog(1 parts)
| Part | Operating Temperature▲▼ | Operating Temperature▲▼ | Mounting Type | Package / Case▲▼ | Package / Case | Propagation Delay▲▼ | Schmitt Trigger Input▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Logic Type | Independent Circuits▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Supplier Device Package |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
70 °C | 0 °C | Through Hole | 0.007619999814778566 m, 0.007619999814778566 m | 16-DIP | 2.2000000043931326e-8 s | 4.75 V | 5.25 V | Monostable | 2 ul | 0.0007999999797903001 A | 0.01600000075995922 A | 16-PDIP |
Key Features
• D-C Triggered from Active-High or Active-Low Gated Logic InputsRetriggerable for Very Long Output Pulses, Up to 100% Duty CycleOverriding Clear Terminates Output Pulse'122 and 'LS122 Have Internal Timing ResistorsD-C Triggered from Active-High or Active-Low Gated Logic InputsRetriggerable for Very Long Output Pulses, Up to 100% Duty CycleOverriding Clear Terminates Output Pulse'122 and 'LS122 Have Internal Timing Resistors
Description
AI
These d-c triggered multivibrators feature output pulse-duration control by three methods. The basic pulse time is programmed by selection of external resistance and capacitance values (see typical application data). The '122 and 'LS122 have internal timing resistors that allow the circuits to be used with only an external capacitor, if so desired. Once triggered, the basic pulse duration may be extended by retriggering the gated low-level-active (A) or high-level-active (B) inputs, or be reduced by use of the overriding clear. Figure 1 illustrates pulse control by retriggering and early clear.
The 'LS122 and 'LS123 are provided enough Schmitt hysteresis to ensure jitter-free triggering from the B input with transition rates as slow as 0.1 millivolt per nanosecond.
The Rintis nominally 10 kfor '122 and 'LS122.
These d-c triggered multivibrators feature output pulse-duration control by three methods. The basic pulse time is programmed by selection of external resistance and capacitance values (see typical application data). The '122 and 'LS122 have internal timing resistors that allow the circuits to be used with only an external capacitor, if so desired. Once triggered, the basic pulse duration may be extended by retriggering the gated low-level-active (A) or high-level-active (B) inputs, or be reduced by use of the overriding clear. Figure 1 illustrates pulse control by retriggering and early clear.
The 'LS122 and 'LS123 are provided enough Schmitt hysteresis to ensure jitter-free triggering from the B input with transition rates as slow as 0.1 millivolt per nanosecond.
The Rintis nominally 10 kfor '122 and 'LS122.