6PADC3101 Series

Automotive 92-dB SNR low-power stereo ADC with digital microphone support and miniDSP

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Key Features

• Qualified for Automotive ApplicationsAEC-Q100 Test Guidance With the Following Results:Device Temperature Grade 2: –40°C to +105°CAmbient Operating Temperature RangeDevice HBM ESD Classification Level H1CDevice CDM ESD Classification Level C3BStereo Audio ADC92-dBA Signal-to-Noise RatioSupports ADC Sample Rates From 8 kHz to 96 kHzInstruction-Programmable Embedded miniDSPFlexible Digital Filtering With RAM Programmable Coefficient,Instructions, and Built-In Processing BlocksLow-Latency IIR Filters for VoiceLinear Phase FIR Filters for AudioAdditional Programmable IIR Filters for EQ, Noise Cancellation or ReductionUp to 128 Programmable ADC Digital Filter CoefficientsSix Audio Inputs With Configurable Automatic Gain Control (AGC)Programmable in Single-Ended or Fully Differential ConfigurationsCan Be 3-Stated for Easy Interoperability With Other Audio ICsLow Power Consumption and Extensive Modular Power Control:6-mW Mono Record, 8-kHz11-mW Stereo Record, 8-kHz10-mW Mono Record, 48-kHz17-mW Stereo Record, 48-kHzDual Programmable Microphone BiasProgrammable PLL for Clock GenerationI2C Control BusAudio Serial Data Bus Supports I2S,Left/Right-Justified, DSP, PCM, and TDM ModesDigital Microphone Input SupportTwo GPIOsPower Supplies:Analog: 2.6 V–3.6 VDigital: Core: 1.65 V–1.95 V,I/O: 1.1 V–3.6 V4-mm × 4-mm 24-Pin RGE (QFN)Qualified for Automotive ApplicationsAEC-Q100 Test Guidance With the Following Results:Device Temperature Grade 2: –40°C to +105°CAmbient Operating Temperature RangeDevice HBM ESD Classification Level H1CDevice CDM ESD Classification Level C3BStereo Audio ADC92-dBA Signal-to-Noise RatioSupports ADC Sample Rates From 8 kHz to 96 kHzInstruction-Programmable Embedded miniDSPFlexible Digital Filtering With RAM Programmable Coefficient,Instructions, and Built-In Processing BlocksLow-Latency IIR Filters for VoiceLinear Phase FIR Filters for AudioAdditional Programmable IIR Filters for EQ, Noise Cancellation or ReductionUp to 128 Programmable ADC Digital Filter CoefficientsSix Audio Inputs With Configurable Automatic Gain Control (AGC)Programmable in Single-Ended or Fully Differential ConfigurationsCan Be 3-Stated for Easy Interoperability With Other Audio ICsLow Power Consumption and Extensive Modular Power Control:6-mW Mono Record, 8-kHz11-mW Stereo Record, 8-kHz10-mW Mono Record, 48-kHz17-mW Stereo Record, 48-kHzDual Programmable Microphone BiasProgrammable PLL for Clock GenerationI2C Control BusAudio Serial Data Bus Supports I2S,Left/Right-Justified, DSP, PCM, and TDM ModesDigital Microphone Input SupportTwo GPIOsPower Supplies:Analog: 2.6 V–3.6 VDigital: Core: 1.65 V–1.95 V,I/O: 1.1 V–3.6 V4-mm × 4-mm 24-Pin RGE (QFN)

Description

The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery-powered portable equipment. The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode. A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks. The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery-powered portable equipment. The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode. A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.