Catalog(8 parts)
| Part | Supplier Device Package | Protocol | Mounting Type | Type | Number of Drivers/Receivers▲▼ | Number of Drivers/Receivers▲▼ | Data Rate▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Package / Case▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
16-SOIC | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-SOIC | 0.003911599982529879 m, 3.900000095367432 ul | |||
16-SOIC | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-SOIC | 0.003911599982529879 m, 3.900000095367432 ul | |||
16-TSSOP | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-TSSOP | 0.004394200164824724 m | 0.004399999976158142 m | ||
16-SOIC | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-SOIC | 0.003911599982529879 m, 3.900000095367432 ul | |||
16-TSSOP | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-TSSOP | 0.004394200164824724 m | 0.004399999976158142 m | ||
16-SOIC | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-SOIC | 0.003911599982529879 m, 3.900000095367432 ul | |||
16-TSSOP | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-TSSOP | 0.004394200164824724 m | 0.004399999976158142 m | ||
16-SOIC | LVDS, Multipoint | Surface Mount | Driver | 0 ul | 4 ul | 209715200 bit/s | 3.5999999046325684 V | 3 V | 16-SOIC | 0.003911599982529879 m, 3.900000095367432 ul |
Key Features
• Differential Line Drivers for 30-Loads and Data Rates(1)Up to 200 Mbps, Clock Frequencies up to 100 MHzSupports Multipoint Bus ArchitecturesOperates from a Single 3.3-V SupplyCharacterized for Operation from -40°C to 85°C16-Pin SOIC (JEDEC MS-012) and 16-Pin TSSOP (JEDEC MS-153) PackagingAPPLICATIONSClock DistributionBackplane or Cabled Multipoint Data Transmission in Telecommunications, Automotive, Industrial, and Other Computer SystemsCellular Base StationsCentral-Office and PBX SwitchingBridges and RoutersLow-Power High-Speed Short-Reach Alternative to TIA/EIA-485(1) The data rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).Differential Line Drivers for 30-Loads and Data Rates(1)Up to 200 Mbps, Clock Frequencies up to 100 MHzSupports Multipoint Bus ArchitecturesOperates from a Single 3.3-V SupplyCharacterized for Operation from -40°C to 85°C16-Pin SOIC (JEDEC MS-012) and 16-Pin TSSOP (JEDEC MS-153) PackagingAPPLICATIONSClock DistributionBackplane or Cabled Multipoint Data Transmission in Telecommunications, Automotive, Industrial, and Other Computer SystemsCellular Base StationsCentral-Office and PBX SwitchingBridges and RoutersLow-Power High-Speed Short-Reach Alternative to TIA/EIA-485(1) The data rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
Description
AI
The SN65MLVD047 is a quadruple line driver. The output current of this device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30. The SN65MLVD047 devices allow for multiple drivers to be present on a single bus. Driver edge rate control is incorporated to support operation. The SN65MLVD047 provides 9-kV ESD protection on all bus pins.
The SN65MLVD047 is a quadruple line driver. The output current of this device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30. The SN65MLVD047 devices allow for multiple drivers to be present on a single bus. Driver edge rate control is incorporated to support operation. The SN65MLVD047 provides 9-kV ESD protection on all bus pins.