STM32WLE5C8U6
ActiveSUB-GHZ WIRELESS MICROCONTROLLERS. ARM CORTEX-M4 @48 MHZ WITH 64 KBYTES OF FLASH MEMORY, 20 KBYTES OF SRAM. LORA, (G)FSK, (G)MSK, BPSK MODULATIONS. AES 256-BIT. MULTIPROTOCOL SYSTEM-ON-CHIP.
Technical Specifications
Parameters and characteristics for this part
| Specification | STM32WLE5C8U6 |
|---|---|
| Current - Receiving | 4.82 mA |
| Current - Transmitting [Max] | 120 mA |
| Current - Transmitting [Min] | 21 mA |
| Data Rate (Max) | 300 kbps |
| Frequency [Max] | 960 MHz |
| Frequency [Min] | 150 MHz |
| GPIO | 29 |
| Memory Size | 64 kB |
| Modulation | FSK, MSK, GMSK, GFSK, BPSK |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 48-UFQFN Exposed Pad |
| Power - Output | 22 dBm |
| Protocol | Sigfox, LoRaWAN 1.0 |
| RF Family/Standard | 802.15.4 |
| Sensitivity | -148 dBm |
| Serial Interfaces | IrDA, ADC, USART, I2C, GPIO, SPI, UART |
| Supplier Device Package | 48-UFQFPN (7x7) |
| Type | TxRx + MCU |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 1.8 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
STM32F0DISCOVERY Series
The STM32WB55xx and STM32WB35xx multiprotocol wireless and ultra-low-power devices embed a powerful and ultra-low-power radio compliant with the Bluetooth®Low Energy SIG specification 5.4 and with IEEE 802.15.4-2011. They contain a dedicated Arm®Cortex®-M0+ for performing all the real-time low layer operation.
The devices are designed to be extremely low-power and are based on the high-performance Arm®Cortex®-M4 32-bit RISC core operating at a frequency of up to 64 MHz. This core features a Floating point unit (FPU) single precision that supports all Arm®single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security.
Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors.
Documents
Technical documentation and resources