STM32F0DISCOVERY Series
Sub-GHz Wireless Microcontrollers. Dual-core Arm Cortex-M4/M0+ @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
Manufacturer: STMicroelectronics
Catalog
Sub-GHz Wireless Microcontrollers. Dual-core Arm Cortex-M4/M0+ @48 MHz with 256 Kbytes of Flash memory, 64 Kbytes of SRAM. LoRa, (G)FSK, (G)MSK, BPSK modulations. AES 256-bit. Multiprotocol System-on-Chip.
Key Features
• Radio
- Frequency range: 150 MHz to 960 MHz
- Modulation: LoRa®, (G)FSK, (G)MSK and BPSK
- RX sensitivity: –123 dBm for 2-FSK(at 1.2 Kbit/s), –148 dBm for LoRa®(at 10.4 kHz, spreading factor 12)
- Transmitter high output power, programmable up to +22 dBm
- Transmitter low output power, programmable up to +15 dBm
- Available integrated passive device (IPD) companion chips for optimized matching, filtering and balun, all in one very compact solution covering each package and each main use cases (22 dBm @ 915 MHz, 14 dBm @ 868 MHz, 17 dBm @ 490 MHz)
- Compliant with the following radio frequency regulations such as ETSI EN 300 220, EN 300 113, EN 301 166, FCC CFR 47 Part 15, 24, 90, and the Japanese ARIB STD-T30, T-67, T-108
- Compatible with standardized or proprietary protocols such as LoRaWAN®, Sigfox™, W-MBus and more (fully open wireless system-on-chip)
• Ultra-low-power platform
- 1.8 V to 3.6 V power supply
- –40 °C to +105 °C temperature range
- Shutdown mode: 31 nA (VDD= 3 V)
- Standby (+ RTC) mode:360 nA (VDD= 3 V)
- Stop2 (+ RTC) mode: 1.07 µA (VDD= 3 V)
- Active-mode MCU: < 72 µA/MHz (CoreMark®)
- Active-mode RX: 4.82 mA
- Active-mode TX: 15 mA at 10 dBm and 87 mA at 20 dBm (LoRa®125 kHz)
• Core
- 32-bit Arm®Cortex®-M4 CPUAdaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from flash memory, frequency up to 48 MHz, MPU and DSP instructions1.25 DMIPS/MHz (Dhrystone 2.1)
- 32-bit Arm®Cortex®-M0+ CPUFrequency up to 48 MHz, MPU0.95 DMIPS/MHz (Dhrystone 2.1)
• Security and identification
- Hardware encryption AES 256-bit
- True random number generator (RNG)
- Sector protection against read/write operations (PCROP, RDP, WRP)
- CRC calculation unit
- Unique device identifier (64-bit UID compliant with IEEE 802-2001 standard)
- 96-bit unique die identifier
- Hardware public key accelerator (PKA)
- Key management services
- Secure sub-GHz MAC layer
- Secure firmware update (SFU)
- Secure firmware install (SFI)
• Supply and reset management
- High-efficiency embedded SMPS step-down converter
- SMPS to LDO smart switch
- Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds
- Ultra-low-power POR/PDR
- Programmable voltage detector (PVD)
- VBATmode with RTC and 20x32-bit backup registers
• Clock sources
- 32 MHz crystal oscillator
- TCXO support: programmable supply voltage
- 32 kHz oscillator for RTC with calibration
- High-speed internal 16 MHz factory trimmed RC (± 1 %)
- Internal low-power 32 kHz RC
- Internal multi-speed low-power 100 kHz to 48 MHz RC
- PLL for CPU, ADC and audio clocks
Description
AI
The STM32WB55xx and STM32WB35xx multiprotocol wireless and ultra-low-power devices embed a powerful and ultra-low-power radio compliant with the Bluetooth®Low Energy SIG specification 5.4 and with IEEE 802.15.4-2011. They contain a dedicated Arm®Cortex®-M0+ for performing all the real-time low layer operation.
The devices are designed to be extremely low-power and are based on the high-performance Arm®Cortex®-M4 32-bit RISC core operating at a frequency of up to 64 MHz. This core features a Floating point unit (FPU) single precision that supports all Arm®single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security.
Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors.
The devices embed high-speed memories (up to 1 Mbyte of flash memory for STM32WB55xx, up to 512 Kbytes for STM32WB35xx, up to 256 Kbytes of SRAM for STM32WB55xx, 96 Kbytes for STM32WB35xx), a Quad-SPI flash memory interface (available on all packages) and an extensive range of enhanced I/Os and peripherals.
Direct data transfer between memory and peripherals and from memory to memory is supported by fourteen DMA channels with a full flexible channel mapping by the DMAMUX peripheral.
The devices feature several mechanisms for embedded flash memory and SRAM: readout protection, write protection and proprietary code readout protection. Portions of the memory can be secured for Cortex®-M0+ exclusive access.
The two AES encryption engines, PKA, and RNG enable lower layer MAC and upper layer cryptography. A customer key storage feature may be used to keep the keys hidden.
The devices offer a fast 12-bit ADC and two ultra-low-power comparators associated with a high accuracy reference voltage generator.
These devices embed a low-power RTC, one advanced 16-bit timer, one general-purpose32-bit timer, two general-purpose 16-bit timers, and two 16-bit low-power timers.
In addition, up to 18 capacitive sensing channels are available for STM32WB55xx (not on UFQFPN48 package). The STM32WB55xx also embed an integrated LCD driver up to 8x40 or 4x44, with internal step-up converter.
The STM32WB55xx and STM32WB35xx also feature standard and advanced communication interfaces, namely one USART (ISO 7816, IrDA, Modbus, and Smartcard mode), one low- power UART (LPUART), two I2Cs (SMBus/PMBus), two SPIs (one for STM32WB35xx) up to 32 MHz, one serial audio interface (SAI) with two channels and three PDMs, one USB 2.0 FS device with embedded crystal-less oscillator, supporting BCD and LPM and one Quad-SPI with execute-in-place (XIP) capability.
The STM32WB55xx and STM32WB35xx operate in the -40 to +105 °C (+125 °C junction) and -40 to +85 °C (+105 °C junction) temperature ranges from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes enables the design of low-power applications.
The devices include independent power supplies for analog input for ADC.
The STM32WB55xx and STM32WB35xx integrate a high efficiency SMPS step-down converter with automatic bypass mode capability when the VDDfalls below VBORx(x = 1, 2, 3, 4) voltage level (default is 2.0 V). It includes independent power supplies for analog input for ADC and comparators, as well as a 3.3 V dedicated supply input for USB.
A VBATdedicated supply allows the devices to back up the LSE 32.768 kHz oscillator, the RTC and the backup registers, thus enabling the STM32WB55xx and STM32WB35xx to supply these functions even if the main VDDis not present through a CR2032-like battery, a Supercap or a small rechargeable battery.
The STM32WB55xx offer four packages, from 48 to 129 pins. The STM32WB35xx offer one package, 48 pins.