Texas Instruments

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops of the ´F374 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK)... Read More

These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the... Read More

The SNx4LVC74A devices integrate two positive-edge triggered D-type flip-flops in one convenient device. The SN54LVC74A is designed for 2.7V to 3.6V VCC operation, and the SN74LVC74A is designed for 1.65V to 3.6V VCC operation. The SNx4LVC74A devices integrate two positive-edge triggered D-type flip-flops in one convenient device. The SN54LVC74A is... Read More

These quadruple 2-line to 1-line data selectors/multiplexers are designed for 2V to 5.5V VCC operation. The SNx4AHC157 devices feature a common strobe (G) input. When the strobe is high, all outputs are low. When the strobe is low, a 4-bit word is selected from one of two sources and is... Read More

The ’AHCT138 3-line to 8-line decoders/demultiplexers are designed to be used in high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. The ’AHCT138 3-line to 8-line decoders/demultiplexers are designed to be used... Read More

The SN64BCT125A bus buffer features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable () input is high. The SN64BCT125A is characterized for operation from -40°C to 85°C and 0°C to 70°C. The SN64BCT125A bus buffer features independent line drivers with 3-state outputs. Each output... Read More

The SN65176B and SN75176B differential bus transceivers are designed for bidirectional data communication on multipoint bus transmission lines. They are designed for balanced transmission lines and meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27. The SN65176B and SN75176B devices combine a 3-state differential line driver and... Read More

The SN65LVCP40 is a signal conditioner and data multiplexer optimized for backplanes. Input equalization and programmable output preemphasis support data rates up to 4 Gbps. Common applications are redundancy switching, signal buffering, or performance improvements on legacy backplane hardware. The SN65LVCP40 combines a pair of 1:2 buffers with a pair... Read More

The SN65C3221E and SN75C3221E consist of one line driver, one line receiver, and a dual charge-pump circuit with ±15-kV IEC ESD protection pin to pin (serial-port connection pins, including GND). These devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four... Read More

The SN65C3222 and SN75C3222 consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small... Read More

The SN65C3223E and SN75C3223E consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). These devices meet the requirements of TIA/EIA-232-F and provide the electrical interface between an asynchronous communication controller and the serial-port connector.... Read More

The ’C3238 devices consist of five line drivers, three line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, these devices include... Read More

The SN65C3243 and SN75C3243 consist of three line drivers, five line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). This device provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small... Read More

The SNx5DP159 device is a dual mode[1] DisplayPort to transition-minimized differential signal (TMDS) retimer supporting digital video interface (DVI) 1.0 and high-definition multimedia interface (HDMI) 1.4b and 2.0b output signals. The SNx5DP159 device supports the dual mode standard version 1.1 type 1 and type 2 through the DDC link or... Read More

The SN65DSI84 DSI to FlatLink™ bridge features a single-channel MIPI® D-PHY receiver front-end configuration with 4 lanes per channel operating at 1 Gbps per lane; a maximum input bandwidth of 4 Gbps. The bridge decodes MIPI® DSI 18bpp RGB666 and 24 bpp RGB888 packets and converts the formatted video data... Read More

The SN65DSI86 DSI to embedded DisplayPort (eDP) bridge features a dual-channel MIPI D-PHY receiver front-end configuration with four lanes per channel operating at 1.5 Gbps per lane and a maximum input bandwidth of 12 Gbps. The bridge decodes MIPI DSI 18-bpp RGB666 and 24-bpp RGB888 packets and converts the formatted... Read More

The SN65EL11 is a differential 1:2 PECL/ECL fanout buffer. The device includes circuitry to maintain a known logic level when inputs are in an open condition. The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package. The SN65EL11 is a differential 1:2 PECL/ECL... Read More

The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition. The VBBpin is a reference voltage output for the device. When the device is used in the single-ended mode, the... Read More

The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V. The VBBpin is a reference voltage output for the device. When the... Read More

The SN65ELT22 is a dual TTL-to-differential PECL translator. It operates on +5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device an ideal solution for clock or data signal translation. The SN65ELT22 is housed in an industry standard... Read More