Catalog(2 parts)
| Part | Output Signal | Mounting Type | Input Signal | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Output Type | Translator Type | Channels per Circuit▲▼ | Operating Temperature▲▼ | Operating Temperature▲▼ | Channel Type | Number of Circuits▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TTL | Surface Mount | PECL | 8-MSOP, 8-TSSOP | 0.0029972000047564507 m | 0.003000000026077032 m | Non-Inverted | Mixed Signal | 1 ul | 85 °C | -40 °C | Unidirectional | 1 ul | |
TTL | Surface Mount | PECL | 8-MSOP, 8-TSSOP | 0.0029972000047564507 m | 0.003000000026077032 m | Non-Inverted | Mixed Signal | 1 ul | 85 °C | -40 °C | Unidirectional | 1 ul |
Key Features
• 3ns (TYP) Propagation DelayOperating Range: VCC= 4.2 V to 5.7 V with GND = 0 V24-mA TTL OutputDeterministic Output Value for Open Input Conditions or When Inputs < 1.3 VBuilt-In Temperature CompensationDrop-In Compatible to the MC10ELT21, MC100ELT21APPLICATIONSData and Clock Transmission Over BackplaneSignaling Level Conversion for Clock or Data3ns (TYP) Propagation DelayOperating Range: VCC= 4.2 V to 5.7 V with GND = 0 V24-mA TTL OutputDeterministic Output Value for Open Input Conditions or When Inputs < 1.3 VBuilt-In Temperature CompensationDrop-In Compatible to the MC10ELT21, MC100ELT21APPLICATIONSData and Clock Transmission Over BackplaneSignaling Level Conversion for Clock or Data
Description
AI
The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.
The VBBpin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCCand VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.
The VBBpin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCCand VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.