Catalog(1 parts)
| Part | Package / Case | Package / Case▲▼ | Package / Case▲▼ | Number of Drivers/Receivers▲▼ | Number of Drivers/Receivers▲▼ | Mounting Type | Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Voltage - Supply▲▼ | Voltage - Supply▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|
8-MSOP, 8-TSSOP | 0.0029972000047564507 m | 0.003000000026077032 m | 0 ul | 1 ul | Surface Mount | Receiver | -40 °C | 85 °C | 5.699999809265137 V | 4.199999809265137 V |
Key Features
• Differential PECL/NECL ReceiverOperating RangePECL: VCC= 4.2 V to 5.7 V With VEE= 0 VNECL: VCC= 0 V With VEE= -4.2 V to -5.7 V250-ps Propagation DelaySupport for Clock Frequencies >2 GHzDeterministic Output Value for Open Input ConditionsBuilt-In Temperature CompensationDrop-In Compatible With MC10EL16, MC100EL16Built-In Input Pulldown ResistorsAPPLICATIONSData and Clock Transmission Over BackplaneDifferential PECL/NECL ReceiverOperating RangePECL: VCC= 4.2 V to 5.7 V With VEE= 0 VNECL: VCC= 0 V With VEE= -4.2 V to -5.7 V250-ps Propagation DelaySupport for Clock Frequencies >2 GHzDeterministic Output Value for Open Input ConditionsBuilt-In Temperature CompensationDrop-In Compatible With MC10EL16, MC100EL16Built-In Input Pulldown ResistorsAPPLICATIONSData and Clock Transmission Over Backplane
Description
AI
The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition.
The VBBpin is a reference voltage output for the device. When the device is used in the single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When the VBBpin is used, place a 0.01-µF decoupling capacitor between VCCand VBB. Also, limit the sink/source current to <0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.
The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition.
The VBBpin is a reference voltage output for the device. When the device is used in the single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When the VBBpin is used, place a 0.01-µF decoupling capacitor between VCCand VBB. Also, limit the sink/source current to <0.5 mA to VBB. Leave VBBopen when it is not used.
The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.