65C3222 Series
3- to 5.5-V dual channel 1Mbps RS-232 line driver/receiver with +/-15-kV ESD protection
Manufacturer: Texas Instruments
Catalog(5 parts)
| Part | Receiver Hysteresis▲▼ | Number of Drivers/Receivers▲▼ | Number of Drivers/Receivers▲▼ | Mounting Type | Data Rate▲▼ | Protocol | Supplier Device Package | Package / Case▲▼ | Package / Case▲▼ | Package / Case | Operating Temperature▲▼ | Operating Temperature▲▼ | Type | Duplex | Voltage - Supply▲▼ | Voltage - Supply▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0.30000001192092896 V | 2 ul | 2 ul | Surface Mount | 1048576 bit/s | RS232 | 20-TSSOP | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP | -40 °C | 85 °C | Transceiver | Full | 3 V | 5.5 V | |
0.30000001192092896 V | 2 ul | 2 ul | Surface Mount | 1048576 bit/s | RS232 | 20-TSSOP | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP | -40 °C | 85 °C | Transceiver | Full | 3 V | 5.5 V | |
0.30000001192092896 V | 2 ul | 2 ul | Surface Mount | 1048576 bit/s | RS232 | 20-SOIC | 0.007493000011891127 m, 0.007499999832361937 m | 20-SOIC | -40 °C | 85 °C | Transceiver | Full | 3 V | 5.5 V | ||
0.30000001192092896 V | 2 ul | 2 ul | Surface Mount | 1048576 bit/s | RS232 | 20-SSOP | 0.0052999998442828655 m, 0.005308600142598152 m | 20-SSOP | -40 °C | 85 °C | Transceiver | Full | 3 V | 5.5 V | ||
0.30000001192092896 V | 2 ul | 2 ul | Surface Mount | 1048576 bit/s | RS232 | 20-TSSOP | 0.004394200164824724 m | 0.004399999976158142 m | 20-TSSOP | -40 °C | 85 °C | Transceiver | Full | 3 V | 5.5 V |
Key Features
• Operates With 3-V to 5.5-V VCCSupplyOperates up to 1 Mbit/sLow Standby Current ...1 µA TypicalExternal Capacitors ...4 × 0.1 µFAccepts 5-V Logic Input With 3.3-V SupplyRS-232 Bus-Pin ESD Protection Exceeds ±15 kV Using Human-Body Model (HBM)ApplicationsBattery-Powered Systems, PDAs, Notebooks, Laptops, Palmtop PCs, and Hand-Held EquipmentOperates With 3-V to 5.5-V VCCSupplyOperates up to 1 Mbit/sLow Standby Current ...1 µA TypicalExternal Capacitors ...4 × 0.1 µFAccepts 5-V Logic Input With 3.3-V SupplyRS-232 Bus-Pin ESD Protection Exceeds ±15 kV Using Human-Body Model (HBM)ApplicationsBattery-Powered Systems, PDAs, Notebooks, Laptops, Palmtop PCs, and Hand-Held Equipment
Description
AI
The SN65C3222 and SN75C3222 consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs.
The SN65C3222 and SN75C3222 can be placed in the power-down mode by setting PWRDOWN\ low, which draws only 1 µA from the power supply. When the devices are powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled, V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting EN\ high.
The SN65C3222 and SN75C3222 consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs.
The SN65C3222 and SN75C3222 can be placed in the power-down mode by setting PWRDOWN\ low, which draws only 1 µA from the power supply. When the devices are powered down, the receivers remain active while the drivers are placed in the high-impedance state. Also, during power down, the onboard charge pump is disabled, V+ is lowered to VCC, and V– is raised toward GND. Receiver outputs also can be placed in the high-impedance state by setting EN\ high.