Texas Instruments

This device contains four independent 2-input XOR gates. Each gate performs the Boolean function Y = A ⊕ B in positive logic. This device contains four independent 2-input XOR gates. Each gate performs the Boolean function Y = A ⊕ B in positive logic.

The ’HCU04 devices contain six independent inverters. They perform the Boolean function Y = A\ in positive logic. The ’HCU04 devices contain six independent inverters. They perform the Boolean function Y = A\ in positive logic.

These devices contain four independent 2-input-NOR gates. The SN5402, SN54LS02, and SN54S02 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7402, SN74LS02, and SN74S02 are characterized for operation from 0°C to 70°C. These devices contain four independent 2-input-NOR gates. The SN5402, SN54LS02, and... Read More

These devices contain four independent 2-input-NAND gates. The open-collector outputs require pull-up resistors to perform correctly. They may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices are often used to generate higher VOHlevels. The SN5403, SN54LS03 and SN54S03 are characterized for operation... Read More

The SNx4LS06 devices feature high-voltage, open-collector outputs to interface with high-level circuits (such as MOS), or for driving high-current loads, and also are characterized for use as inverter buffers for driving TTL inputs. The SNx4LS06 devices have a rated output voltage of 30 V. The SNx4LS06 devices feature high-voltage, open-collector... Read More

These devices contain four independent 2-input AND gates. The open-collector outputs require pull-up resistors to perform correctly. They may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices are often used to generate higher VOHlevels. The SN5409, SN54LS09, and SN54S09 are characterized for... Read More

These devices contain three independent 3-input NAND gates. The SN5410, SN54LS10, and SN54S10 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN7410, SN74LS10 and SN74S10 are characterized for operation from 0°C to 70°C. These devices contain three independent 3-input NAND gates. The SN5410,... Read More

The '107 contain two independent J-K flip-flops with individual J-K, clock, and direct clear inputs. The '107 is a positive pulse-triggered flip-flop. The J-K input data is loaded into the master while the clock is high and transferred to the slave and the outputs on the high-to-low clock transition. For... Read More

The '221 and 'LS221 devices are monolithic dual multivibrators with performance characteristics virtually identical to those of the '121 devices. Each multivibrator features a negative-transition- triggered input and a positive-transition-triggered input, either of which can be used as an inhibit input. Pulse triggering occurs at a particular voltage level and... Read More

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K\ inputs meeting the setup time requirements are... Read More

These devices contain three independent 3-input AND gates. The SN54LS11 and SN54S11 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LS11 and SN74S11 are characterized for operation from 0°C to 70°C. These devices contain three independent 3-input AND gates. The SN54LS11 and SN54S11... Read More

These devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset and clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K inputs meeting the setup time requirements are... Read More

These d-c triggered multivibrators feature output pulse-duration control by three methods. The basic pulse time is programmed by selection of external resistance and capacitance values (see typical application data). The '122 and 'LS122 have internal timing resistors that allow the circuits to be used with only an external capacitor, if... Read More

These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to... Read More

These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to... Read More

These Schottky-clamped TTL MSI circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast-enable circuit, the delay times... Read More

These TTL encoders feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The '147 and 'LS147 encode nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition requires no input condition as zero is encoded when all nine data lines are... Read More

These monolithic data selectors/multiplexers contain full on-chip binary decoding to select the desired data source. The '150 selects one-of-sixteen data sources; the '151A, 'LS151, and 'S151 select one-of-eight data sources. The '150, '151A, 'LS151, and 'S151 have a strobe input which must be at a low logic level to enable... Read More

Each of these monolithic, data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separator strobe inputs are provided for each of the two four-time sections. Each of these monolithic, data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip,... Read More

These monolithic transistor-transistor-logic (TTL) circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes... Read More