74LS126 Series

4-ch, 4.75-V to 5.25-V bipolar buffers with 3-state outputs

Catalog(4 parts)

Part	Supplier Device Package	Output Type	Voltage - Supply▲▼	Voltage - Supply▲▼	Current - Output High, Low▲▼	Current - Output High, Low▲▼	Mounting Type	Operating Temperature▲▼	Logic Type	Number of Elements▲▼	Number of Bits per Element▲▼	Package / Case▲▼	Package / Case▲▼	Package / Case	Package / Case▲▼	Package / Case▲▼	Current - Output High, Low▲▼
Texas Instruments SN74LS126ANS Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SO	14-SO	3-State	4.75 V	5.25 V	0.005200000014156103 A	0.01600000075995922 A	Surface Mount	70 °C	Buffer, Non-Inverting	4 ul	1 ul	0.0052999998442828655 m	0.005308600142598152 m	14-SOIC
Texas Instruments SN74LS126AD Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SOIC		3-State	4.75 V	5.25 V			Surface Mount	70 °C	Buffer, Non-Inverting	4 ul	1 ul			14-SOIC	0.003899999894201755 m	0.003911599982529879 m	0.0026000000070780516 A, 0.024000000208616257 A
Texas Instruments SN74LS126AN Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-PDIP		3-State	4.75 V	5.25 V			Through Hole	70 °C	Buffer, Non-Inverting	4 ul	1 ul			14-DIP	0.007619999814778566 m	0.007619999814778566 m	0.0026000000070780516 A, 0.024000000208616257 A
Texas Instruments SN74LS126ANSR Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SO	14-SO	3-State	4.75 V	5.25 V			Surface Mount	70 °C	Buffer, Non-Inverting	4 ul	1 ul	0.0052999998442828655 m	0.005308600142598152 m	14-SOIC			0.0026000000070780516 A, 0.024000000208616257 A

Key Features

• Quad Bus Buffers3-State OutputsSeparate Control for Each ChannelThe SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied.Quad Bus Buffers3-State OutputsSeparate Control for Each ChannelThe SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied.

Description

These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The ’125 and ’LS125A devices’ outputs are disabled when G\ is high. The ’126 and ’LS126A devices’ outputs are disabled when G is low. These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The ’125 and ’LS125A devices’ outputs are disabled when G\ is high. The ’126 and ’LS126A devices’ outputs are disabled when G is low.