74LS109 Series
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset
Manufacturer: Texas Instruments
Catalog(5 parts)
Part | Trigger Type | Voltage - Supply▲▼ | Voltage - Supply▲▼ | Output Type | Operating Temperature▲▼ | Operating Temperature▲▼ | Clock Frequency▲▼ | Current - Output High, Low▲▼ | Current - Output High, Low▲▼ | Function | Max Propagation Delay @ V, Max CL▲▼ | Package / Case▲▼ | Package / Case | Current - Quiescent (Iq)▲▼ | Number of Bits per Element▲▼ | Type | Supplier Device Package | Number of Elements▲▼ | Mounting Type |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Positive Edge | 4.75 V | 5.25 V | Complementary | 70 °C | 0 °C | 33000000 Hz | 0.00800000037997961 A | 0.00039999998989515007 A | Reset, Set(Preset) | 3.999999975690116e-8 s | 0.007619999814778566 m, 0.007619999814778566 m | 16-DIP | 0.00800000037997961 A | 1 ul | JK Type | 16-PDIP | 2 ul | Through Hole | |
Texas Instruments SN74LS109ANSRFlip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.209", 5.30mm Width) | Positive Edge | 4.75 V | 5.25 V | Complementary | 70 °C | 0 °C | 33000000 Hz | 0.00800000037997961 A | 0.00039999998989515007 A | Reset, Set(Preset) | 2.5000000292152436e-8 s | 16-SOIC (0.209", 5.30mm Width) | 0.00800000037997961 A | 1 ul | JK Type | 16-SO | 2 ul | Surface Mount | |
Texas Instruments SN74LS109ANG4Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-DIP (0.300", 7.62mm) | Positive Edge | 4.75 V | 5.25 V | Complementary | 70 °C | 0 °C | 33000000 Hz | 0.00800000037997961 A | 0.00039999998989515007 A | Reset, Set(Preset) | 2.5000000292152436e-8 s | 0.007619999814778566 m, 0.007619999814778566 m | 16-DIP | 0.00800000037997961 A | 1 ul | JK Type | 16-PDIP | 2 ul | Through Hole |
Texas Instruments SN74LS109ADRE4Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width) | Positive Edge | 4.75 V | 5.25 V | Complementary | 70 °C | 0 °C | 33000000 Hz | 0.00800000037997961 A | 0.00039999998989515007 A | Reset, Set(Preset) | 2.5000000292152436e-8 s | 0.003911599982529879 m, 3.900000095367432 ul | 16-SOIC | 0.00800000037997961 A | 1 ul | JK Type | 16-SOIC | 2 ul | Surface Mount |
Texas Instruments SN74LS109ADFlip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width) | Positive Edge | 4.75 V | 5.25 V | Complementary | 70 °C | 0 °C | 33000000 Hz | 0.00800000037997961 A | 0.00039999998989515007 A | Reset, Set(Preset) | 3.999999975690116e-8 s | 0.003911599982529879 m, 3.900000095367432 ul | 16-SOIC | 0.00800000037997961 A | 1 ul | JK Type | 16-SOIC | 2 ul | Surface Mount |
Key Features
• Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPsDependable Texas Instruments Quality and ReliabilityPackage Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPsDependable Texas Instruments Quality and Reliability
Description
AI
These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K\ inputs meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.
The SN54109 and SN54LS109A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74109 and SN74LS109A are characterized for operation from 0°C to 70°C.
These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K\ inputs meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.
The SN54109 and SN54LS109A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74109 and SN74LS109A are characterized for operation from 0°C to 70°C.