Texas Instruments

The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices. Information at the D... Read More

The ’HC153 and ’HCT153 are dual 4- to 1-line selector/multiplexers that select one of four sources for each section by the common select inputs, S0 and S1. When the enable inputs (1E\, 2E\) are HIGH, the outputs are in the LOW state. The ’HC153 and ’HCT153 are dual 4- to... Read More

The ’HC154 and ’HCT154 are 4-to-16 line decoders/demultiplexers with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0\ to Y15\,... Read More

These data selectors/multiplexers contain inverters and drivers to supply full data selection to the four output gates. A separate strobe (G)\ input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. These data selectors/multiplexers contain inverters and drivers to supply... Read More

The ’HC161, ’HCT161, ’HC163, and ’HCT163 are presettable synchronous counters that feature look-ahead carry logic for use in high-speed counting applications. The ’HC161 and ’HCT161 are asynchronous reset decade and binary counters, respectively; the ’HC163 and ’HCT163 devices are decade and binary counters, respectively, that are reset synchronously with the... Read More

High Speed CMOS Logic 8-Input Multiplexer, 3-State

The ’HC161, ’HCT161, ’HC163, and ’HCT163 are presettable synchronous counters that feature look-ahead carry logic for use in high-speed counting applications. The ’HC161 and ’HCT161 are asynchronous reset decade and binary counters, respectively; the ’HC163 and ’HCT163 devices are decade and binary counters, respectively, that are reset synchronously with the... Read More

High Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register

High Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register

High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State Outputs

The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having... Read More

The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and CD54/74HCT191 are asynchronously presettable binary counters. Presetting the counter to the number on preset data inputs (A–D) is accomplished by a low asynchronous parallel load (LOAD)\ input. Counting occurs when LOAD\ is high, count enable (CTEN)\ is low,... Read More

This device contains two independent 4-input NAND gates. Each gate performs the Boolean function Y =A ● B ● C ● Din positive logic. This device contains two independent 4-input NAND gates. Each gate performs the Boolean function Y =A ● B ● C ● Din positive logic.

The ’HC221 and CD74HCT221 are dual monostable multivibrators with reset. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of RXand CXprovides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the B... Read More

High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Inverting

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SNx4HCT244 devices are organized as two 4-bit buffers or drivers with separate output-enable (OE) inputs. When OE is low, the device... Read More

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted... Read More

The ’HC257 and ’HCT257 are quad 2-input multiplexers which select four bits of data from two sources under the control of a common Select Input (S). The Output Enable input (OE\) is active LOW. When OE\ is HIGH, all of the outputs (1Y-4Y) are in the high impedance state regardless... Read More

These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G)\ input is at a high logic level. To ensure the high-impedance state during power up or power down, G\... Read More

High Speed CMOS Logic 8-Bit Addressable Latch