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Series List(7161)
| Part | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Programmable Timers and Oscillators | 5 | 1 | These voltage-controlled oscillators (VCOs) are improved versions of the original VCO family: SN54LS124, SN54LS324 thru SN54LS327, SN74LS124, and SN74LS324 thru SN74LS327. These new devices feature improved voltage-to-frequency linearity, range, and compensation. With the exception of the 'LS624 and 'LS628, all of these devices feature two independent VCOs in a single... Read More | |
| Logic | 9 | 1 | These octal bus transceivers are designed for asynchronous two-way communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. The enable input (G) can be... Read More | |
| Shift Registers | 2 | 1 | SN54LS673, SN74LS673 The 'LS673 is a 16-bit shift register and a 16-bit storage register in a single 24-pin package. A three-state input/output (SER/Q15) port to the shift register allows serial entry and/or reading of data. The storage register is connected in a parallel data loop with the shift register and... Read More | |
| Logic | 5 | 1 | These magnitude comparators perform comparisons of two eight-bit binary or BCD words. All types provide P = Q\ outputs and all except 'LS688 provide P > Q\ outputs as well. The 'LS682, 'LS684, 'LS686, and 'LS688 have totem-pole outputs, while the 'LS685 and 'LS687 have open-collector outputs. The 'LS682 features... Read More | |
| Logic | 5 | 1 | These magnitude comparators perform comparisons of two eight-bit binary or BCD words. All types provide P = Q\ outputs and all except 'LS688 provide P > Q\ outputs as well. The 'LS682, 'LS684, 'LS686, and 'LS688 have totem-pole outputs, while the 'LS685 and 'LS687 have open-collector outputs. The 'LS682 features... Read More | |
| Logic | 8 | 1 | These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to... Read More | |
| Logic | 4 | 1 | These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (C) is high and the Q output will follow the data input as... Read More | |
| Logic | 4 | 1 | These four-bit magnitude comparators perform comparison of straight binary and straight BCD (8-4-2-1) codes. Three fully decoded decisions about two 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external gates. Words of greater length... Read More | |
| Logic | 8 | 1 | Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the '90A and 'LS90, divide-by-six for the '92A and 'LS92, and the divide-by eight for the '93A and 'LS93.... Read More | |
| Logic | 4 | 1 | Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the '90A and 'LS90, divide-by-six for the '92A and 'LS92, and the divide-by eight for the '93A and 'LS93.... Read More | |
| Logic | 7 | 1 | Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the '90A and 'LS90, divide-by-six for the '92A and 'LS92, and the divide-by eight for the '93A and 'LS93.... Read More | |
| Logic | 10 | 1 | The SNx4LV02A devices are quadruple 2-input positive-NOR gates designed for 2-V to 5.5-V VCCoperation. The SNx4LV02A devices perform the Boolean function Y =A + Bor Y =A●Bin positive logic. The SNx4LV02A devices are quadruple 2-input positive-NOR gates designed for 2-V to 5.5-V VCCoperation. The SNx4LV02A devices perform the Boolean function... Read More | |
| Logic | 8 | 1 | The SN74LV05A device contains six independent inverters designed for 2 V to 5.5 V VCCoperation.
This device performs the Boolean function Y =A.
The SN74LV05A device contains six independent inverters designed for 2 V to 5.5 V VCCoperation.
This device performs the Boolean function Y =A. | |
| Logic | 9 | 1 | These hex inverter buffers/drivers are designed for 2 V to 5.5 V VCCoperation. The SN74LV06A device performs the Boolean function Y =Ain positive logic. The open-drain output require pull-up resistors to perform correctly and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. These... Read More | |
| Logic | 12 | 1 | These hex buffers/drivers are designed for 2-V to5.5-V VCCoperation.
The SN74LV07A device performs the Boolean function Y = A in positive logic.
These hex buffers/drivers are designed for 2-V to5.5-V VCCoperation.
The SN74LV07A device performs the Boolean function Y = A in positive logic. | |
| Logic | 11 | 1 | These triple 3-input positive-NAND gates are designed for 2 V to 5.5 V VCCoperation. The SN74LV10A devices perform the Boolean function Y =A • B • Cin positive logic. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the... Read More | |
| Logic | 11 | 1 | This triple 3-input positive-AND gate is designed for 2-V to 5.5-V VCCoperation. The SN74LV11A performs the Boolean function Y = A • B • C or Y = (A\ + B\ + C\)\ in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the... Read More | |
| Logic | 8 | 1 | The SN74LV126A quadruple bus buffer gates are designed for 2V to 5.5V VCC operation. These quadruple bus buffer gates are designed for 2V to 5.5V VCC operation. The SN74LV126A devices feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To... Read More | |
| Logic | 12 | 1 | The ’LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V VCCoperation. The ’LV132A devices perform the Boolean function Y =A • Bor Y =A+Bin positive logic. Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and... Read More | |
| Signal Switches, Multiplexers, Decoders | 22 | 1 | The SN74LV138AT is a 3-line to 8-line decoder/demultiplexer, designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times... Read More | |