74LS85 Series

4-bit magnitude comparators

Catalog(4 parts)

Part	Type	Operating Temperature▲▼	Mounting Type	Number of Bits▲▼	Package / Case	Package / Case▲▼	Voltage - Supply▲▼	Voltage - Supply▲▼	Max Propagation Delay @ V, Max CL▲▼	Supplier Device Package	Output Function	Current - Output High, Low▲▼	Current - Output High, Low▲▼	Output
Texas Instruments SN74LS85DRE4 Magnitude Comparator Bit Active High Output A<B, A=B, A>B 16-SOIC	Magnitude Comparator	70 °C	Surface Mount	4 ul	16-SOIC	0.003911599982529879 m, 3.900000095367432 ul	4.75 V	5.25 V	4.5000000170603016e-8 s	16-SOIC	A<B, A=B, A>B	0.00800000037997961 A	0.00039999998989515007 A	Active High
Texas Instruments SN74LS85D Magnitude Comparator Bit Active High Output A<B, A=B, A>B 16-SOIC	Magnitude Comparator	70 °C	Surface Mount	4 ul	16-SOIC	0.003911599982529879 m, 3.900000095367432 ul	4.75 V	5.25 V	4.5000000170603016e-8 s	16-SOIC	A<B, A=B, A>B	0.00800000037997961 A	0.00039999998989515007 A	Active High
Texas Instruments SN74LS85NSR Magnitude Comparator Bit Active High Output A<B, A=B, A>B 16-SO	Magnitude Comparator	70 °C	Surface Mount	4 ul	16-SOIC (0.209", 5.30mm Width)		4.75 V	5.25 V	4.5000000170603016e-8 s	16-SO	A<B, A=B, A>B	0.00800000037997961 A	0.00039999998989515007 A	Active High
Texas Instruments SN74LS85N Magnitude Comparator Bit Active High Output A<B, A=B, A>B 16-PDIP	Magnitude Comparator	70 °C	Through Hole	4 ul	16-DIP	0.007619999814778566 m, 0.007619999814778566 m	4.75 V	5.25 V	4.5000000170603016e-8 s	16-PDIP	A<B, A=B, A>B	0.00800000037997961 A	0.00039999998989515007 A	Active High

Description

These four-bit magnitude comparators perform comparison of straight binary and straight BCD (8-4-2-1) codes. Three fully decoded decisions about two 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external gates. Words of greater length may be compared by connecting comparators in cascade. The A > B, A < B, and A = B outputs of a stage handling less-significant bits are connected to the corresponding A > B, A < B, and A = B inputs of the next stage handling more-significant bits. The stage handling the least-significant bits must have a high-level voltage applied to the A = B input. The cascading paths of the '85, 'LS85, and 'S85 are implemented with only a two-gate-level delay to reduce overall comparison times for long words. An alternate method of cascading which further reduces the comparison time is shown in the typical application data. These four-bit magnitude comparators perform comparison of straight binary and straight BCD (8-4-2-1) codes. Three fully decoded decisions about two 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external gates. Words of greater length may be compared by connecting comparators in cascade. The A > B, A < B, and A = B outputs of a stage handling less-significant bits are connected to the corresponding A > B, A < B, and A = B inputs of the next stage handling more-significant bits. The stage handling the least-significant bits must have a high-level voltage applied to the A = B input. The cascading paths of the '85, 'LS85, and 'S85 are implemented with only a two-gate-level delay to reduce overall comparison times for long words. An alternate method of cascading which further reduces the comparison time is shown in the typical application data.