74LV126 Series

4-ch, 2-V to 5.5-V buffers with 3-state outputs

Catalog(6 parts)

Part	Number of Bits per Element▲▼	Logic Type	Operating Temperature▲▼	Operating Temperature▲▼	Supplier Device Package	Number of Elements▲▼	Voltage - Supply▲▼	Voltage - Supply▲▼	Package / Case	Package / Case▲▼	Package / Case▲▼	Mounting Type	Current - Output High, Low▲▼	Current - Output High, Low▲▼	Output Type	Package / Case▲▼	Package / Case▲▼	Package / Case▲▼
Texas Instruments SN74LV126APWR Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-TSSOP	1 ul	Buffer, Non-Inverting	-40 °C	125 °C	14-TSSOP	4 ul	2 V	5.5 V	14-TSSOP	0.004394200164824724 m	0.004399999976158142 m	Surface Mount	0.01600000075995922 A	0.01600000075995922 A	3-State
Texas Instruments SN74LV126ADBR Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SSOP	1 ul	Buffer, Non-Inverting	-40 °C	125 °C	14-SSOP	4 ul	2 V	5.5 V	14-SSOP			Surface Mount	0.01600000075995922 A	0.01600000075995922 A	3-State	0.005308600142598152 m	0.0052999998442828655 m
Texas Instruments SN74LV126ADGVR Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-TVSOP	1 ul	Buffer, Non-Inverting	-40 °C	125 °C		4 ul	2 V	5.5 V	14-TFSOP			Surface Mount	0.01600000075995922 A	0.01600000075995922 A	3-State	0.004399999976158142 m
Texas Instruments SN74LV126APWT Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-TSSOP	1 ul	Buffer, Non-Inverting	-40 °C	125 °C	14-TSSOP	4 ul	2 V	5.5 V	14-TSSOP	0.004394200164824724 m	0.004399999976158142 m	Surface Mount	0.01600000075995922 A	0.01600000075995922 A	3-State
Texas Instruments SN74LV126AD Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SOIC	1 ul	Buffer, Non-Inverting	-40 °C	125 °C		4 ul	2 V	5.5 V	14-SOIC			Surface Mount	0.01600000075995922 A	0.01600000075995922 A	3-State		0.003911599982529879 m	0.003899999894201755 m
Texas Instruments SN74LV126APWRG4 Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-TSSOP	1 ul	Buffer, Non-Inverting	-40 °C	125 °C	14-TSSOP	4 ul	2 V	5.5 V	14-TSSOP	0.004394200164824724 m	0.004399999976158142 m	Surface Mount	0.01600000075995922 A	0.01600000075995922 A	3-State

Key Features

• 2V to 5.5V VCC operationMaximum tpd of 6.5ns at 5VTypical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°CTypical VOHV (output VOH undershoot) >2.3V at VCC = 3.3V, TA = 25°CIoff supports live insertion, partial power down mode, and back drive protectionSupport mixed-mode voltage operation on all portsLatch-up performance exceeds 250mAper JESD 172V to 5.5V VCC operationMaximum tpd of 6.5ns at 5VTypical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°CTypical VOHV (output VOH undershoot) >2.3V at VCC = 3.3V, TA = 25°CIoff supports live insertion, partial power down mode, and back drive protectionSupport mixed-mode voltage operation on all portsLatch-up performance exceeds 250mAper JESD 17

Description

The SN74LV126A quadruple bus buffer gates are designed for 2V to 5.5V VCC operation. These quadruple bus buffer gates are designed for 2V to 5.5V VCC operation. The SN74LV126A devices feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. The SN74LV126A quadruple bus buffer gates are designed for 2V to 5.5V VCC operation. These quadruple bus buffer gates are designed for 2V to 5.5V VCC operation. The SN74LV126A devices feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.