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Series List(7161)
Part | Category | # Parts | Status | Description |
---|---|---|---|---|
Logic | 8 | 1 | These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that... Read More | |
Logic | 8 | 1 | These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control (DIR) input. The output-enableinput can be used to disable... Read More | |
Logic | 5 | 1 | These identity comparators perform comparisons on two 8-bit binary or BCD words and provide P = Q\ outputs. These devices have totem-pole outputs. The SN54ALS688 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS688 is characterized for operation from 0°C to 70°C. These... Read More | |
Logic | 5 | 1 | These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean functions Y = AB or Y = A\B + AB\ in positive logic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the... Read More | |
Logic | 5 | 1 | These synchronous, presettable, 8-bit up/down counters feature internal-carry look-ahead circuitry for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when so instructed by the count-enable (,) inputs and internal gating. This mode of operation... Read More | |
Logic | 3 | 1 | These dual 4-bit D-type latches feature 3-state outputs designed specifically for bus driving. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The dual 4-bit latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the... Read More | |
Logic | 5 | 1 | This 9-bit latch is designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus. In addition, this device provides a 3-state buffer-type output and is easily implemented in parity applications. The nine latches are... Read More | |
Logic | 10 | 1 | This quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC00 performs the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic. This quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC00 performs the Boolean function... Read More | |
Logic | 11 | 1 | This hex inverter contains six independent inverters designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVC04 performs the Boolean function Y = A\.
This hex inverter contains six independent inverters designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVC04 performs the Boolean function Y = A\. | |
Logic | 6 | 1 | This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC10 performs the Boolean function Y = (A • B • C)\ or Y = A\ + B\ + C\ in positive logic. This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC10... Read More | |
Logic | 4 | 1 | This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC126 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND... Read More | |
Logic | 7 | 1 | This hex Schmitt-trigger inverter is designed for 2.3-V to 3.6-V VCCoperation.
The SN74ALVC14 contains six independent inverters and performs the Boolean function Y = A\.
This hex Schmitt-trigger inverter is designed for 2.3-V to 3.6-V VCCoperation.
The SN74ALVC14 contains six independent inverters and performs the Boolean function Y = A\. | |
Universal Bus Functions | 3 | 1 | This 16-bit universal bus driver is designed for 1.65-V to 3.6-V VCCoperation. Data flow from A to Y is controlled by the output-enable (OE\) input. The device operates in the transparent mode when the latch-enable (LE\) input is low. When LE\ is high, the A data is latched if the... Read More | |
Logic | 7 | 1 | This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVC16244A is designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides... Read More | |
Universal Bus Functions | 2 | 1 | This 20-bit universal bus driver is designed for 1.65-V to 3.6-V VCCoperation. Data flow from A to Y is controlled by the output-enable (OE\) input. The device operates in the transparent mode when the latch-enable (LE\) input is low. When LE\ is high, the A data is latched if the... Read More | |
Universal Bus Functions | 5 | 1 | This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCCoperation. Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) input is... Read More | |
Logic | 4 | 1 | This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVCH162244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It... Read More | |
Logic | 4 | 1 | This 12-bit to 24-bit multiplexed D-type latch is designed for 1.65-V to 3.6-VCCoperation. The SN74ALVCH162260 is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or bus-interface... Read More | |
Universal Bus Functions | 4 | 1 | This 12-bit to 24-bit registered bus exchanger is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVCH162268 is used for applications in which data must be transferred from a narrow high-speed bus to a wide, lower-frequency bus. The device provides synchronous data exchange between the two ports. Data is stored in... Read More | |
Universal Bus Functions | 4 | 1 | This 16-bit universal bus driver is designed for 1.65-V to 3.6-V VCCoperation. Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE)\ input is low. When LE\ is high, the A data is latched if the... Read More |