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74ALVC16835 Series

18-Bit Universal Bus Driver With 3-State Outputs

Manufacturer: Texas Instruments

Catalog(4 parts)

PartLogic TypePackage / CasePackage / CasePackage / CaseSupplier Device PackageCurrent - Output High, LowCurrent - Output High, LowVoltage - SupplyVoltage - SupplyNumber of CircuitsMounting TypeOperating TemperatureOperating TemperaturePackage / CasePackage / Case
Texas Instruments
SN74ALVC16835DLR
Universal Bus Driver 18-Bit 56-SSOP
Universal Bus Driver
0.007493000011891127 m
0.007499999832361937 m
56-BSSOP
56-SSOP
0.024000000208616257 A
0.024000000208616257 A
3.5999999046325684 V
1.649999976158142 V
18-Bit
Surface Mount
-40 °C
85 °C
Texas Instruments
SN74ALVC16835DGGR
Universal Bus Driver 18-Bit 56-TSSOP
Universal Bus Driver
56-TFSOP
56-TSSOP
0.024000000208616257 A
0.024000000208616257 A
3.5999999046325684 V
1.649999976158142 V
18-Bit
Surface Mount
-40 °C
85 °C
0.006099999882280827 m
0.006095999851822853 m
Texas Instruments
SN74ALVC16835GQLR
Universal Bus Driver 18-Bit 56-BGA Microstar Junior (7x4.5)
Universal Bus Driver
56-VFBGA
56-BGA Microstar Junior (7x4.5)
0.024000000208616257 A
0.024000000208616257 A
3.5999999046325684 V
1.649999976158142 V
18-Bit
Surface Mount
-40 °C
85 °C
Texas Instruments
SN74ALVC16835DL
Universal Bus Driver 18-Bit 56-SSOP
Universal Bus Driver
0.007493000011891127 m
0.007499999832361937 m
56-BSSOP
56-SSOP
0.024000000208616257 A
0.024000000208616257 A
3.5999999046325684 V
1.649999976158142 V
18-Bit
Surface Mount
-40 °C
85 °C

Key Features

Member of the Texas Instruments Widebus™ FamilyOperates From 1.65 V to 3.6 VMax tpdof 2 ns at 3.3 V±24-mA Output Drive at 3.3 VIdeal for Use in PC100 Register DIMM Revision 1.1Latch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Widebus is a trademark of Texas Instruments.Member of the Texas Instruments Widebus™ FamilyOperates From 1.65 V to 3.6 VMax tpdof 2 ns at 3.3 V±24-mA Output Drive at 3.3 VIdeal for Use in PC100 Register DIMM Revision 1.1Latch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Widebus is a trademark of Texas Instruments.

Description

AI
This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCCoperation. Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCCoperation. Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.