| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
Microchip TechnologySY89852U | Integrated Circuits (ICs) | 4 | 1 | The SY89852U is a 2.5V/3.3V precision, high-speed, 2:1 differential MUX capable of handling clocks up to 2.5GHz and data streams up to 2.5Gbps.The differential input includes Micrel's unique, patent pending 3-pin input termination architecture that allows users to interface to any differential signal (AC- or DC-coupled) as small as 100mV... Read More |
Microchip TechnologySY89853 | Integrated Circuits (ICs) | 5 | 1 | The SY89853U features two, low jitter 2:1 differential multiplexers with 100K LVPECL (800mV) compatible outputs, capable of handling clocks up to 2.5GHz and data streams up to 2.5Gbps.The SY89853U differential inputs include Micrel's unique, 3-input termination architecture that allows users to interface to any differential signal (AC- or DC-Coupled) as... Read More |
Microchip TechnologySY898530 | Clock/Timing | 4 | 1 | The SY898530U is a 1:16 Fanout buffer which can accept most standard differential logic levels and outputs the signal as a differential 2.5V LVPECL signal. The part can amplify input signals as small as 150mVpp to the full LVPECL output swing. The SY898530U is well suited for clock distribution applications... Read More |
Microchip TechnologySY898530U | Clock Buffers And Drivers | 7 | 1 | The SY898530U is a 1:16 Fanout buffer which can accept most standard differential logic levels and outputs the signal as a differential 2.5V LVPECL signal. The part can amplify input signals as small as 150mVpp to the full LVPECL output swing. The SY898530U is well suited for clock distribution applications... Read More |
Microchip TechnologySY898531L | Clock Buffers And Drivers | 3 | 1 | The SY898531L is a 3.3V, low skew, 1:9 LVPECL fanout buffer with two selectable clock input pairs. Most standard differential input levels can be applied to the CLK, /CLK pair while LVPECL, CML, or SSTL input levels can be applied to the PCLK, /PCLK pair. To eliminate runt pulses on... Read More |
Microchip TechnologySY898533 | Clock/Timing | 5 | 1 | The SY898533L is a 3.3V, low skew, 1:4 LVPECL fanout buffer with two selectable clock input pairs. Most standard differential input levels can be applied to the CLK, /CLK pair while LVPECL, CML, or SSTL input levels can be applied to the PCLK, /PCLK pair. To eliminate runt pulses on... Read More |
Microchip TechnologySY898533L | Clock/Timing | 5 | 1 | The SY898533L is a 3.3V, low skew, 1:4 LVPECL fanout buffer with two selectable clock input pairs. Most standard differential input levels can be applied to the CLK, /CLK pair while LVPECL, CML, or SSTL input levels can be applied to the PCLK, /PCLK pair. To eliminate runt pulses on... Read More |
Microchip TechnologySY898535 | Clock/Timing | 13 | 1 | The SY898535L is a 3.3V, low skew, 1:4 LVCMOS/LVTTL-to-LVPECL fanout buffer with two selectable single ended clock inputs. The CLK0 and CLK1 accept LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. To eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin,... Read More |
Microchip TechnologySY898535L | Clock/Timing | 7 | 1 | The SY898535L is a 3.3V, low skew, 1:4 LVCMOS/LVTTL-to-LVPECL fanout buffer with two selectable single ended clock inputs. The CLK0 and CLK1 accept LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. To eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin,... Read More |
Microchip TechnologySY898535XL | Semiconductors - ICs | 6 | 1 | The SY898535XL is a 3.3V, low skew, 1:4 Crystal Oscillator/LVCMOS/LVTTL-to-LVPECL fanout buffer with selectable single ended clock or crystal inputs. The clock input accepts LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. To eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable... Read More |