SY898531L Series
Manufacturer: Microchip Technology
Catalog
Key Features
• + Provides nine differential 3.3V LVPECL copies
• + Selects between differential CLK, /CLK or LVPECL clock inputs
• + CLK, /CLK pair accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL input levels
• + PCLK, /PCLK pair accepts LVPECL, CML, SSTL input levels
• + 500MHz Maximum output frequency
• + <2ns Propagation delay (In-to-Q)
• + <50ps Output skew
• + <250ps Part-to-part skew
• + Additive phase jitter, RMS: 0.17ps (typical)
• + 3.3V ±5% supply voltage
• + 0°C to +70°C temperature operating range
• + Available in a 32-pin TQFP package
Description
AI
The SY898531L is a 3.3V, low skew, 1:9 LVPECL fanout buffer with two selectable clock input pairs. Most standard differential input levels can be applied to the CLK, /CLK pair while LVPECL, CML, or SSTL input levels can be applied to the PCLK, /PCLK pair. To eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin, the clock enable is synchronized with the input signal.The SY898531L operates from a 3.3V ±5% supply and is guaranteed over the full industrial temperature range of 0°C to +70°C. The SY898531L is part of Micrel’s highspeed, Precision Edge product line.