SY89853 Series
Manufacturer: Microchip Technology
Catalog
Key Features
• + Dual 2:1 MUX, each channel selects from inputs
• + Unique, patent-pending input isolation design minimizes crosstalk
• + Low power 210mW (VCC = 2.5V)
• + DC-to- >2.5Gbps data rate throughput
• + <360ps IN-to-Q tpd
• + <180ps tr/tf times
• + <1psRMS random jitter
• + <10psPP deterministic jitter
• + <10psPP total jitter (clock)
• + <0.7psRMS crosstalk-induced jitter
• + Unique, patent-pending 50O input termination and VT pin accepts DC- and AC-coupled inputs (CML, LVDS, PECL)
• + 800mV LVPECL output swing
• + Power supply 2.5V ±5% or 3.3V ±10%
• + -40°C to +85°C temperature range
• + Available in 32-pin (5mm x 5mm) QFN package
Description
AI
The SY89853U features two, low jitter 2:1 differential multiplexers with 100K LVPECL (800mV) compatible outputs, capable of handling clocks up to 2.5GHz and data streams up to 2.5Gbps.The SY89853U differential inputs include Micrel's unique, 3-input termination architecture that allows users to interface to any differential signal (AC- or DC-Coupled) as small as 100mV without any level shifting or termination resistors networks in the signal path. The result is a clean, stub-free, low jitter interface solution. The differential 800mV LVPECL outputs have fast rise/fall times guaranteed to be less than 180ps.
The SY89853U operates from a 2.5V ±5% or a 3.3V ±10% supply, and is guaranteed over the full industrial temperature range (-40°C to +85°C). For applications that require higher performance, consider the SY58026U. The SY89853U is part of Micrel's Precision Edge® product family. An eighth latched input, D7, is provided for cascading multiple PDCs for increased programmable range. The cascade logic allows full control of multiple PDCs, at the expense of only a single added line to the data bus for each additional PDC, without the need for any external gating.