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CD74HC4046A Series

High Speed CMOS Logic Phase-Locked-Loop with VCO

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

High Speed CMOS Logic Phase-Locked-Loop with VCO

PartSupplier Device PackageVoltage - Supply [Min]Voltage - Supply [Max]InputDivider/Multiplier [custom]Divider/Multiplier [custom]Package / CasePackage / CaseDifferential - Input:Output [custom]Differential - Input:Output [custom]Mounting TypeRatio - Input:Output [custom]Ratio - Input:Output [custom]PLLFrequency - Max [Max]Operating Temperature [Min]Operating Temperature [Max]TypeNumber of CircuitsOutputPackage / Case [x]Package / Case [x]
Texas Instruments
CD74HC4046AE
16-PDIP
2 V
6 V
CMOS
0.3 in, 7.62 mm
16-DIP
Through Hole
4
1
38 MHz
-55 °C
125 °C
Phase Lock Loop (PLL)
1
CMOS
Texas Instruments
CD74HC4046AM96
16-SOIC
2 V
6 V
CMOS
0.154 in, 3.9 mm Width
16-SOIC
Surface Mount
4
1
38 MHz
-55 °C
125 °C
Phase Lock Loop (PLL)
1
CMOS
Texas Instruments
CD74HC4046APWT
16-TSSOP
2 V
6 V
CMOS
16-TSSOP
Surface Mount
4
1
38 MHz
-55 °C
125 °C
Phase Lock Loop (PLL)
1
CMOS
0.173 "
4.4 mm
Texas Instruments
CD74HC4046AM
16-SOIC
2 V
6 V
CMOS
0.154 in, 3.9 mm Width
16-SOIC
Surface Mount
4
1
38 MHz
-55 °C
125 °C
Phase Lock Loop (PLL)
1
CMOS
Texas Instruments
CD74HC4046ANSR
16-SO
2 V
6 V
CMOS
16-SOIC (0.209", 5.30mm Width)
Surface Mount
4
1
38 MHz
-55 °C
125 °C
Phase Lock Loop (PLL)
1
CMOS
Texas Instruments
CD74HC4046AMT
16-SOIC
2 V
6 V
CMOS
0.154 in, 3.9 mm Width
16-SOIC
Surface Mount
4
1
38 MHz
-55 °C
125 °C
Phase Lock Loop (PLL)
1
CMOS
Texas Instruments
CD74HC4046APWR
16-TSSOP
2 V
6 V
CMOS
16-TSSOP
Surface Mount
4
1
38 MHz
-55 °C
125 °C
Phase Lock Loop (PLL)
1
CMOS
0.173 "
4.4 mm

Key Features

• Operating Frequency RangeUp to 18MHz (Typ) at VCC= 5VMinimum Center Frequency of 12MHz at VCC= 4.5VChoice of Three Phase ComparatorsEXCLUSIVE-OREdge-Triggered JK Flip-FlopEdge-Triggered RS Flip-FlopExcellent VCO Frequency LinearityVCO-Inhibit Control for ON/OFF Keying and for Low Standby Power ConsumptionMinimal Frequency DriftOperating Power Supply Voltage RangeVCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6VDigital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6VFanout (Over Temperature Range)Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL LoadsBus Driver Outputs . . . . . . . . . . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . -55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il≤ 1µA at VOL, VOHApplicationsFM Modulation and DemodulationFrequency Synthesis and MultiplicationFrequency DiscriminationTone DecodingData Synchronization and ConditioningVoltage-to-Frequency ConversionMotor-Speed ControlOperating Frequency RangeUp to 18MHz (Typ) at VCC= 5VMinimum Center Frequency of 12MHz at VCC= 4.5VChoice of Three Phase ComparatorsEXCLUSIVE-OREdge-Triggered JK Flip-FlopEdge-Triggered RS Flip-FlopExcellent VCO Frequency LinearityVCO-Inhibit Control for ON/OFF Keying and for Low Standby Power ConsumptionMinimal Frequency DriftOperating Power Supply Voltage RangeVCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6VDigital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6VFanout (Over Temperature Range)Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL LoadsBus Driver Outputs . . . . . . . . . . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . -55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il≤ 1µA at VOL, VOHApplicationsFM Modulation and DemodulationFrequency Synthesis and MultiplicationFrequency DiscriminationTone DecodingData Synchronization and ConditioningVoltage-to-Frequency ConversionMotor-Speed Control

Description

AI
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.