CD74HC4046AE

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Texas Instruments

HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO

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Search across all available documentation for this part.

DocumentsImplications of Slow or Floating CMOS Inputs (Rev. E)Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency +17

CD74HC4046AE

Active

Texas Instruments

HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO

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DocumentsImplications of Slow or Floating CMOS Inputs (Rev. E)Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency +17

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics commom to parts in this series

Specification	CD74HC4046AE	74HC4046 Series

Differential - Input:Output	False	False
Divider/Multiplier	False	False
Frequency - Max [Max]	38 MHz	38 MHz
Input	CMOS	CMOS
Mounting Type	Through Hole	Surface Mount, Through Hole
Number of Circuits	1	1
Operating Temperature [Max]	125 °C	125 °C
Operating Temperature [Min]	-55 °C	-55 °C
Output	CMOS	CMOS
Package / Case	0.3 in	0.209 - 0.3 "
Package / Case	16-DIP	16-TSSOP, 16-SOIC, 16-DIP
Package / Case	7.62 mm	5.3 - 7.62 mm
Package / Case	-	0.154 - 0.173 in
Package / Case	-	3.9 - 4.4 mm
PLL	True	True
Ratio - Input:Output	1:4	1:4
Supplier Device Package	16-PDIP	16-TSSOP, 16-SOIC, 16-SO, 16-PDIP
Type	Phase Lock Loop (PLL)	Phase Lock Loop (PLL)
Voltage - Supply [Max]	6 V	6 V
Voltage - Supply [Min]	2 V	2 V

74HC4046 Series

HIGH SPEED CMOS LOGIC PHASE-LOCKED-LOOP WITH VCO

Part	Mounting Type	Operating Temperature [Min]	Operating Temperature [Max]	Number of Circuits	Output	Ratio - Input:Output	Type	Supplier Device Package	Input	Package / Case [x]	Package / Case	Package / Case [y]	Frequency - Max [Max]	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case
Texas Instruments CD74HC4046APWR	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-TSSOP	CMOS	0.173 in	16-TSSOP	4.4 mm	38 MHz	2 V	6 V
Texas Instruments CD74HC4046APW	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-TSSOP	CMOS	0.173 in	16-TSSOP	4.4 mm	38 MHz	2 V	6 V
Texas Instruments CD74HC4046AM	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-SOIC	CMOS	0.154 in	16-SOIC	3.9 mm	38 MHz	2 V	6 V
Texas Instruments CD74HC4046ANSRE4	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-SO	CMOS		16-SOIC		38 MHz	2 V	6 V	0.209 "	5.3 mm
Texas Instruments CD74HC4046AM96G4	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-SOIC	CMOS	0.154 in	16-SOIC	3.9 mm	38 MHz	2 V	6 V
Texas Instruments CD74HC4046AM96	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-SOIC	CMOS	0.154 in	16-SOIC	3.9 mm	38 MHz	2 V	6 V
Texas Instruments CD74HC4046APWRG4	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-TSSOP	CMOS	0.173 in	16-TSSOP	4.4 mm	38 MHz	2 V	6 V
Texas Instruments CD74HC4046AMT	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-SOIC	CMOS	0.154 in	16-SOIC	3.9 mm	38 MHz	2 V	6 V
Texas Instruments CD74HC4046AE	Through Hole	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-PDIP	CMOS		16-DIP		38 MHz	2 V	6 V	0.3 in	7.62 mm
Texas Instruments CD74HC4046ANSR	Surface Mount	-55 °C	125 °C	1	CMOS	1:4	Phase Lock Loop (PLL)	16-SO	CMOS		16-SOIC		38 MHz	2 V	6 V	0.209 "	5.3 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 0.84
		10	$ 0.75
		25	$ 0.72
		100	$ 0.59
		250	$ 0.55
		500	$ 0.49
		821	$ 0.37
		1000	$ 0.38
		2500	$ 0.36
		5000	$ 0.34
Texas Instruments	TUBE	1	$ 0.72
		100	$ 0.55
		250	$ 0.41
		1000	$ 0.29

Description

General part information

74HC4046 Series

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.

The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.

The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.

Documents

Technical documentation and resources

Digital Logic Data Book

Logic Guide

Datasheet

CD74HC4046AE

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CD74HC4046AE

Deep-Dive with AI

Technical Specifications

74HC4046 Series

Pricing

Description

74HC4046 Series

Documents

Implications of Slow or Floating CMOS Inputs (Rev. E)

Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency

CMOS Phase-Locked-Loop Applications (Rev. B)

CMOS Power Consumption and CPD Calculation (Rev. B)

Signal Switch Data Book (Rev. A)

TI IBIS File Creation, Validation, and Distribution Processes

Implementation of FSK Modulation and Demodulation using CD74HC4046A

Designing With Logic (Rev. C)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

LOGIC Pocket Data Book (Rev. B)

CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A datasheet (Rev. J)

SN54/74HCT CMOS Logic Family Applications and Restrictions

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

Live Insertion

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Input and Output Characteristics of Digital Integrated Circuits

Logic Guide (Rev. AB)

Digital Logic Data Book

Logic Guide

Technical Specifications

74HC4046 Series