
SN74HC273DWR
ActiveOCTAL D-TYPE FLIP-FLOPS WITH CLEAR

SN74HC273DWR
ActiveOCTAL D-TYPE FLIP-FLOPS WITH CLEAR
Description
General part information
74HC273 Series
This circuit is a positive-edge-triggered D-type flip-flop with a direct clear (CLR) input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
This circuit is a positive-edge-triggered D-type flip-flop with a direct clear (CLR) input.
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74HC273DWR |
|---|---|
| Clock Frequency | 60 MHz |
| Current - Output High | 5.2 mA |
| Current - Output Low | 5.2 mA |
| Current - Quiescent (Iq) | 8 µA |
| Function | Master Reset |
| Input Capacitance | 3 pF |
| Max CL | 50 pF |
| Max Propagation Delay | 13 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 bits |
| Number of Elements | 1 |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Output Type | Non-Inverted |
| Package Length | 0.295 in |
| Package Name | 20-SOIC |
| Package Width | 7.5 mm |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply (Maximum) | 6 V |
| Voltage - Supply (Minimum) | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Sign in to see pricing
Create a free account to access distributor pricing data.
CAD
3D models and CAD resources for this part
Documents
Technical documentation and resources