

Technical Specifications
Parameters and characteristics for this part
| Specification | SN74SSTU32866GKER |
|---|---|
| Logic Type | 1:2 Configurable Registered Buffer with Parity, Parity, 1:2, Configurable Registered Buffer, 1:1 |
| Mounting Type | Surface Mount |
| Number of Bits | 14, 25 |
| Number of Bits (Max) | 25 bits |
| Number of Bits (Min) | 14 bits |
| Operating Temperature (Max) | 70 °C |
| Operating Temperature (Min) | 0 °C |
| Package / Case | 96-LFBGA |
| Package Length | 13.5 mm |
| Package Name | 96-LFBGA |
| Package Width | 5.5 mm |
| Supply Voltage (Max) | 1.9 V |
| Supply Voltage (Min) | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 1000 | $ 8.74 | 1w |
CAD
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Description
General part information
74SSTU32864 Series
This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCCoperation. In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads. In the 1:2 pinout configuration, two devices per DIMM are required to drive 18 SDRAM loads.
All inputs are SSTL_18, except the LVCMOS reset (RESET)\ and LVCMOS control (Cn) inputs. All outputs are edge-controlled circuits optimized for unterminated DIMM loads and meet SSTL_18 specifications.
The SN74SSTU32864 operates from a differential clock (CLK and CLK\). Data are registered at the crossing of CLK going high and CLK\ going low.
Documents
Technical documentation and resources