Technical Specifications
Parameters and characteristics for this part
| Specification | SN74SSTU32864DZKER |
|---|---|
| Logic Type | 1:1, 1:2 Configurable Registered Buffer |
| Mounting Type | Surface Mount |
| Number of Bits | 14, 25 |
| Number of Bits (Max) | 25 bits |
| Number of Bits (Min) | 14 bits |
| Operating Temperature (Max) | 70 °C |
| Operating Temperature (Min) | 0 °C |
| Package / Case | 96-LFBGA |
| Package Length | 13.6 mm |
| Package Name | 96-PBGA MICROSTAR |
| Package Width | 5.6 mm |
| Supply Voltage (Max) | 1.9 V |
| Supply Voltage (Min) | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | Bulk | 28 | $ 10.88 | 1w |
| Cut Tape (CT) | 1 | $ 12.30 | 1w | |
| 10 | $ 9.66 | |||
| 25 | $ 9.00 | |||
| 100 | $ 8.28 | |||
| 250 | $ 7.93 | |||
| 500 | $ 7.73 | |||
| Tape & Reel (TR) | 1000 | $ 7.55 | 1w | |
CAD
3D models and CAD resources for this part
Description
General part information
74SSTU32864 Series
This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCCoperation. In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads. In the 1:2 pinout configuration, two devices per DIMM are required to drive 18 SDRAM loads.
All inputs are SSTL_18, except the LVCMOS reset (RESET)\ and LVCMOS control (Cn) inputs. All outputs are edge-controlled circuits optimized for unterminated DIMM loads and meet SSTL_18 specifications.
The SN74SSTU32864 operates from a differential clock (CLK and CLK\). Data are registered at the crossing of CLK going high and CLK\ going low.
Documents
Technical documentation and resources
