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8413601SA - 20-pin (W) package image

8413601SA

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Texas Instruments

OCTAL D-TYPE FLIP-FLOPS WITH CLEAR 20-CFP -55 TO 125

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8413601SA - 20-pin (W) package image

8413601SA

Active
Texas Instruments

OCTAL D-TYPE FLIP-FLOPS WITH CLEAR 20-CFP -55 TO 125

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Technical Specifications

Parameters and characteristics commom to parts in this series

Specification8413601SASN54ALS273 Series
Clock Frequency30 MHz30 MHz
Current - Output High, Low12 mA12 mA
Current - Quiescent (Iq)29 mA29 mA
Max Propagation Delay @ V, Max CL20 ns20 ns
Mounting TypeSurface MountSurface Mount
Number of Bits per Element88
Number of Elements [custom]11
Operating Temperature [Max]125 °C125 °C
Operating Temperature [Min]-55 C-55 C
Output TypeNon-InvertedNon-Inverted
Package / Case20-CFlatPack20-CFlatPack, 20-CLCC
Supplier Device Package20-CFP20-CFP, 20-LCCC
Supplier Device Package-8.89
Supplier Device Package-8.89
Trigger TypePositive EdgePositive Edge
TypeD-TypeD-Type
Voltage - Supply [Max]5.5 V5.5 V
Voltage - Supply [Min]4.5 V4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

SN54ALS273 Series

Octal D-type Flip-Flops With Clear

PartNumber of Elements [custom]Current - Output High, LowNumber of Bits per ElementVoltage - Supply [Max]Voltage - Supply [Min]Trigger TypeTypeOutput TypePackage / CaseOperating Temperature [Min]Operating Temperature [Max]Clock FrequencyMax Propagation Delay @ V, Max CLCurrent - Quiescent (Iq)Mounting TypeSupplier Device PackageSupplier Device Package [y]Supplier Device Package [x]
Texas Instruments
8413601SA
These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output. The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C. These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output. The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.
1
12 mA
8
5.5 V
4.5 V
Positive Edge
D-Type
Non-Inverted
20-CFlatPack
-55 C
125 °C
30 MHz
20 ns
29 mA
Surface Mount
20-CFP
Texas Instruments
84136012A
These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output. The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C. These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input. Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output. The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.
1
12 mA
8
5.5 V
4.5 V
Positive Edge
D-Type
Non-Inverted
20-CLCC
-55 C
125 °C
30 MHz
20 ns
29 mA
Surface Mount
20-LCCC
8.89
8.89

Description

General part information

SN54ALS273 Series

These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.

Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.

The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.