SN54ALS273 Series
Octal D-type Flip-Flops With Clear
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Octal D-type Flip-Flops With Clear
| Part | Number of Elements [custom] | Current - Output High, Low | Number of Bits per Element | Voltage - Supply [Max] | Voltage - Supply [Min] | Trigger Type | Type | Output Type | Package / Case | Operating Temperature [Min] | Operating Temperature [Max] | Clock Frequency | Max Propagation Delay @ V, Max CL | Current - Quiescent (Iq) | Mounting Type | Supplier Device Package | Supplier Device Package [y] | Supplier Device Package [x] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments 8413601SA | 1 | 12 mA | 8 | 5.5 V | 4.5 V | Positive Edge | D-Type | Non-Inverted | 20-CFlatPack | -55 C | 125 °C | 30 MHz | 20 ns | 29 mA | Surface Mount | 20-CFP | ||
Texas Instruments 84136012A | 1 | 12 mA | 8 | 5.5 V | 4.5 V | Positive Edge | D-Type | Non-Inverted | 20-CLCC | -55 C | 125 °C | 30 MHz | 20 ns | 29 mA | Surface Mount | 20-LCCC | 8.89 | 8.89 |
Key Features
• Contain Eight Flip-Flops With Single-Rail OutputsBuffered Clock and Direct-Clear InputsIndividual Data Input to Each Flip-FlopApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPsContain Eight Flip-Flops With Single-Rail OutputsBuffered Clock and Direct-Clear InputsIndividual Data Input to Each Flip-FlopApplications Include:Buffer/Storage RegistersShift RegistersPattern GeneratorsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
Description
AI
These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.
These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.
The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.