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SOT-SC70 (DCK)

1P1G125QDCKRG4Q1

Active
Texas Instruments

BUFFER/LINE DRIVER 1-CH NON-INVERTING 3-ST CMOS 5-PIN SC-70 T/R AUTOMOTIVE AEC-Q100

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SOT-SC70 (DCK)

1P1G125QDCKRG4Q1

Active
Texas Instruments

BUFFER/LINE DRIVER 1-CH NON-INVERTING 3-ST CMOS 5-PIN SC-70 T/R AUTOMOTIVE AEC-Q100

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Description

General part information

SN74LVC1G125-Q1 Series

This bus buffer gate is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC1G125-Q1 device is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCCoperating range.

Technical Specifications

Parameters and characteristics for this part

Specification1P1G125QDCKRG4Q1
Current - Output High24 mA
Current - Output Low24 mA
GradeAutomotive
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element1 bits
Number of Elements1
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Output Type3-State
Package / CaseSOT-353, SC-70-5, 5-TSSOP
Package NameSC-70-5
QualificationAEC-Q100
Voltage - Supply (Maximum)5.5 V
Voltage - Supply (Minimum)1.65 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

Datasheet
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
LVC Characterization Information
Input and Output Characteristics of Digital Integrated Circuits
Little Logic Guide 2018 (Rev. G)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
Texas Instruments Little Logic Application Report
Logic Guide (Rev. AB)
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Signal Switch Data Book (Rev. A)
CMOS Power Consumption and CPD Calculation (Rev. B)
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Understanding Advanced Bus-Interface Products Design Guide
Automotive Logic Devices Brochure
TI IBIS File Creation, Validation, and Distribution Processes
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
Selecting the Right Level Translation Solution (Rev. A)
Drive Transmission Lines With Logic
Live Insertion
Design Summary for WCSP Little Logic (Rev. B)
LOGIC Pocket Data Book (Rev. B)
Implications of Slow or Floating CMOS Inputs (Rev. E)
SN74LVC1G125-Q1 Single-BUS buffer gate with 3-state output datasheet (Rev. E)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Standard Linear & Logic for PCs, Servers & Motherboards
How to Select Little Logic (Rev. A)
Optimizing On-Board and Wireless Charger Systems Using Logic and Translation (Rev. A)
Low-Voltage Logic (LVC) Designer's Guide