CD54HCT75F3A
ActiveHIGH SPEED CMOS LOGIC DUAL 2-BIT BISTABLE TRANSPARENT LATCH
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CD54HCT75F3A
ActiveHIGH SPEED CMOS LOGIC DUAL 2-BIT BISTABLE TRANSPARENT LATCH
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Technical Specifications
Parameters and characteristics for this part
| Specification | CD54HCT75F3A |
|---|---|
| Circuit | 2:2 |
| Current - Output High, Low | 4 mA, 4 mA |
| Delay Time - Propagation | 10 ns |
| Independent Circuits | 2 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Through Hole |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Complementary |
| Package / Case | 16-CDIP (0.300", 7.62mm) |
| Supplier Device Package | 16-CDIP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
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CD54HCT75 Series
High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latch
| Part | Package / Case | Delay Time - Propagation | Output Type | Circuit | Logic Type | Current - Output High, Low | Supplier Device Package | Mounting Type | Independent Circuits | Voltage - Supply [Max] | Voltage - Supply [Min] | Operating Temperature [Min] | Operating Temperature [Max] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD54HCT75F3AThe ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.
The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected. | 16-CDIP (0.300", 7.62mm) | 10 ns | Complementary | 2:2 | D-Type Transparent Latch | 4 mA, 4 mA | 16-CDIP | Through Hole | 2 | 5.5 V | 4.5 V | -55 °C | 125 °C |
Description
General part information
CD54HCT75 Series
The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.
The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.
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