
CDC2351QDBG4
ActiveAUTOMOTIVE 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
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CDC2351QDBG4
ActiveAUTOMOTIVE 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
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Technical Specifications
Parameters and characteristics commom to parts in this series
Specification | CDC2351QDBG4 | CDC2351-Q1 Series |
---|---|---|
Differential - Input:Output [custom] | False | False |
Differential - Input:Output [custom] | False | False |
Frequency - Max [Max] | 100 MHz | 100 MHz |
Grade | Automotive | Automotive |
Mounting Type | Surface Mount | Surface Mount |
Number of Circuits | 1 | 1 |
Operating Temperature [Max] | 125 °C | 125 °C |
Operating Temperature [Min] | -40 °C | -40 °C |
Output | LVTTL | LVTTL |
Package / Case | 0.209 in | 0.209 in |
Package / Case | 5.3 mm | 5.3 mm |
Package / Case | 24-SSOP | 24-SSOP |
Qualification | AEC-Q100 | AEC-Q100 |
Ratio - Input:Output [custom] | 1 | 1 |
Ratio - Input:Output [custom] | 10 | 10 |
Supplier Device Package | 24-SSOP | 24-SSOP |
Type | Fanout Buffer (Distribution) | Fanout Buffer (Distribution) |
Voltage - Supply [Max] | 3.6 V | 3.6 V |
Voltage - Supply [Min] | 3 V | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
CDC2351-Q1 Series
Automotive 1-line to 10-line clock driver with 3-state outputs
Part | Output | Mounting Type | Frequency - Max [Max] | Voltage - Supply [Max] | Voltage - Supply [Min] | Supplier Device Package | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Qualification | Grade | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Operating Temperature [Max] | Operating Temperature [Min] | Package / Case | Package / Case | Package / Case | Number of Circuits | Type |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDC2351QDBRThe CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C.
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C. | LVTTL | Surface Mount | 100 MHz | 3.6 V | 3 V | 24-SSOP | AEC-Q100 | Automotive | 1 | 10 | 125 °C | -40 °C | 0.209 in | 5.3 mm | 24-SSOP | 1 | Fanout Buffer (Distribution) | ||
Texas Instruments CDC2351QDBRG4The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C.
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C. | LVTTL | Surface Mount | 100 MHz | 3.6 V | 3 V | 24-SSOP | AEC-Q100 | Automotive | 1 | 10 | 125 °C | -40 °C | 0.209 in | 5.3 mm | 24-SSOP | 1 | Fanout Buffer (Distribution) | ||
Texas Instruments CDC2351QDBThe CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C.
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C. | LVTTL | Surface Mount | 100 MHz | 3.6 V | 3 V | 24-SSOP | AEC-Q100 | Automotive | 1 | 10 | 125 °C | -40 °C | 0.209 in | 5.3 mm | 24-SSOP | 1 | Fanout Buffer (Distribution) | ||
Texas Instruments CDC2351QDBG4The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C.
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C. | LVTTL | Surface Mount | 100 MHz | 3.6 V | 3 V | 24-SSOP | AEC-Q100 | Automotive | 1 | 10 | 125 °C | -40 °C | 0.209 in | 5.3 mm | 24-SSOP | 1 | Fanout Buffer (Distribution) |
Description
General part information
CDC2351-Q1 Series
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE\) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation over the full automotive temperature range of -40°C to 125°C.
Documents
Technical documentation and resources