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DSBGA (YZP)

SN74LVC1G80YZPR

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Texas Instruments

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

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DSBGA (YZP)

SN74LVC1G80YZPR

Active
Texas Instruments

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

Find alt

Description

General part information

74LVC1G80 Series

The SN74LVC1G80-Q1 device is an automotive AEC-Q100 qualified, single positive-edge-triggered D-type flip-flop that is designed for 1.65-V to 5.5-V VCCoperation.

When data at the data (D) input meets the setup time requirement, the data is transferred to theQoutput on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC1G80YZPR
Clock Frequency160 MHz
Current - Output High32 mA
Current - Output Low32 mA
Current - Quiescent (Iq)10 µA
FunctionStandard
Input Capacitance3.5 pF
Max CL50 pF
Max Propagation Delay4.5 ns
Mounting TypeSurface Mount
Number of Bits per Element1 bits
Number of Elements1
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
Output TypeInverted
Package / Case5-XFBGA, DSBGA
Package Length1.4 mm
Package Name5-DSBGA
Package Width0.9 mm
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply (Maximum)5.5 V
Voltage - Supply (Minimum)1.65 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

Selecting the Right Level Translation Solution (Rev. A)
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
LOGIC Pocket Data Book (Rev. B)
SN74LVC1G80 Single Positive-Edge-Triggered D-Type Flip-Flop datasheet (Rev. S)
TI IBIS File Creation, Validation, and Distribution Processes
Standard Linear & Logic for PCs, Servers & Motherboards
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Live Insertion
LVC Characterization Information
Design Summary for WCSP Little Logic (Rev. B)
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Understanding Advanced Bus-Interface Products Design Guide
Input and Output Characteristics of Digital Integrated Circuits
Implications of Slow or Floating CMOS Inputs (Rev. E)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Logic Guide (Rev. AB)
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
Signal Switch Data Book (Rev. A)
Texas Instruments Little Logic Application Report
CMOS Power Consumption and CPD Calculation (Rev. B)
Little Logic Guide 2018 (Rev. G)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
Low-Voltage Logic (LVC) Designer's Guide
How to Select Little Logic (Rev. A)
Power-Up Behavior of Clocked Devices (Rev. B)
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
SN74LVC1G80YZPR | Datasheet