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74LVC1G175DCKTG4

74LVC1G175DCKTG4

Unknown
Texas Instruments

SINGLE D-TYPE FLIP-FLOP WITH ASYNCHRONOUS CLEAR

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74LVC1G175DCKTG4

74LVC1G175DCKTG4

Unknown
Texas Instruments

SINGLE D-TYPE FLIP-FLOP WITH ASYNCHRONOUS CLEAR

Find alt

Description

General part information

SN74LVC1G175 Series

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC1G175 device has an asynchronous clear (CLR) input. WhenCLRis high, data from the input pin (D) is transferred to the output pin (Q) on the clock's (CLK) rising edge. WhenCLRis low, Q is forced into the low state, regardless of the clock edge or data on D.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Technical Specifications

Parameters and characteristics for this part

Specification74LVC1G175DCKTG4
Clock Frequency175 MHz
Current - Output High32 mA
Current - Output Low32 mA
Current - Quiescent (Iq)10 µA
FunctionReset
Input Capacitance3 pF
Max CL50 pF
Max Propagation Delay4 ns
Mounting TypeSurface Mount
Number of Bits per Element1 bits
Number of Elements1
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Output TypeNon-Inverted
Package / Case6-TSSOP, SC-88, SOT-363
Package NameSC-70-6
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply (Maximum)5.5 V
Voltage - Supply (Minimum)1.65 V

Pricing

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CAD

3D models and CAD resources for this part

Documents

Technical documentation and resources

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)
Generate an Enable Signal that can be Toggled
Texas Instruments Little Logic Application Report
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Input and Output Characteristics of Digital Integrated Circuits
Push-Button Circuit (Rev. B)
Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
Implications of Slow or Floating CMOS Inputs (Rev. E)
Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
Logic Guide (Rev. AB)
Use of the CMOS Unbuffered Inverter in Oscillator Circuits
Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
Selecting the Right Level Translation Solution (Rev. A)
LOGIC Pocket Data Book (Rev. B)
SN74LVC1G175 Single D-Type Flip-Flop With Asynchronous Clear datasheet (Rev. G)
How to Select Little Logic (Rev. A)
Signal Switch Data Book (Rev. A)
LVC Characterization Information
Standard Linear & Logic for PCs, Servers & Motherboards
Low-Voltage Logic (LVC) Designer's Guide
Live Insertion
Understanding Advanced Bus-Interface Products Design Guide
TI IBIS File Creation, Validation, and Distribution Processes
CMOS Power Consumption and CPD Calculation (Rev. B)
Design Summary for WCSP Little Logic (Rev. B)
Power-Up Behavior of Clocked Devices (Rev. B)
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS
Little Logic Guide 2018 (Rev. G)
16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)