
CD4072BNS
ActiveIC GATE OR 2CH 4-INP 14-SO
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CD4072BNS
ActiveIC GATE OR 2CH 4-INP 14-SO
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Technical Specifications
Parameters and characteristics commom to parts in this series
Specification | CD4072BNS | CD4072 Series |
---|---|---|
Current - Output High, Low | - | 3.4 mA |
Current - Quiescent (Max) | - | 1 çA |
Input Logic Level - High | - | 3.5 V |
Input Logic Level - High | - | 11 V |
Input Logic Level - Low | - | 1.5 V |
Input Logic Level - Low | - | 4 V |
Logic Type | - | OR Gate |
Max Propagation Delay @ V, Max CL | - | 90 ns |
Mounting Type | - | Surface Mount, Through Hole |
null | - | |
Number of Circuits | - | 2 |
Number of Inputs | - | 4 |
Operating Temperature | - | -55 °C |
Operating Temperature | - | 125 °C |
Package / Case | - | 5.3 mm |
Package / Case | - | 0.209 in |
Package / Case | - | 14-SOIC, 14-TSSOP, 14-DIP |
Package / Case | - | 3.9 - 7.62 mm |
Package / Case | - | 0.154 - 0.3 in |
Package / Case | - | 0.173 in |
Package / Case | - | 4.4 mm |
Supplier Device Package | - | 14-SO, 14-TSSOP |
Voltage - Supply | - | 18 V |
Voltage - Supply | - | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Distributor | Package | Quantity | $ | |
---|---|---|---|---|
Digikey | Bulk | 1480 | $ 0.20 |
CD4072 Series
2-ch 4-input 3-V to 18-V OR gate
Part | Current - Quiescent (Max) [Max] | Number of Circuits | Number of Inputs | Input Logic Level - High [Min] | Input Logic Level - High [Max] | Supplier Device Package | Logic Type | Current - Output High, Low | Max Propagation Delay @ V, Max CL | Input Logic Level - Low [Min] | Input Logic Level - Low [Max] | Mounting Type | Package / Case [y] | Package / Case [y] | Package / Case | Operating Temperature [Min] | Operating Temperature [Max] | Voltage - Supply [Max] | Voltage - Supply [Min] | Package / Case | Package / Case | Package / Case [custom] | Package / Case [custom] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CD4072BNSR | 1 çA | 2 | 4 | 3.5 V | 11 V | 14-SO | OR Gate | 3.4 mA, 3.4 mA | 90 ns | 1.5 V | 4 V | Surface Mount | 5.3 mm | 0.209 in | 14-SOIC | -55 °C | 125 °C | 18 V | 3 V | ||||
Texas Instruments CD4072BM | 1 çA | 2 | 4 | 3.5 V | 11 V | OR Gate | 3.4 mA, 3.4 mA | 90 ns | 1.5 V | 4 V | Surface Mount | 14-SOIC | -55 °C | 125 °C | 18 V | 3 V | 3.9 mm | 0.154 in | |||||
Texas Instruments CD4072BNS | |||||||||||||||||||||||
Texas Instruments CD4072BPW | 1 çA | 2 | 4 | 3.5 V | 11 V | 14-TSSOP | OR Gate | 3.4 mA, 3.4 mA | 90 ns | 1.5 V | 4 V | Surface Mount | 14-TSSOP | -55 °C | 125 °C | 18 V | 3 V | 0.173 in | 4.4 mm | ||||
Texas Instruments CD4072BMT | 1 çA | 2 | 4 | 3.5 V | 11 V | OR Gate | 3.4 mA, 3.4 mA | 90 ns | 1.5 V | 4 V | Surface Mount | 14-SOIC | -55 °C | 125 °C | 18 V | 3 V | 3.9 mm | 0.154 in | |||||
Texas Instruments CD4072BPWG4 | 1 çA | 2 | 4 | 3.5 V | 11 V | 14-TSSOP | OR Gate | 3.4 mA, 3.4 mA | 90 ns | 1.5 V | 4 V | Surface Mount | 14-TSSOP | -55 °C | 125 °C | 18 V | 3 V | 0.173 in | 4.4 mm | ||||
Texas Instruments CD4072BM96 | 1 çA | 2 | 4 | 3.5 V | 11 V | OR Gate | 3.4 mA, 3.4 mA | 90 ns | 1.5 V | 4 V | Surface Mount | 14-SOIC | -55 °C | 125 °C | 18 V | 3 V | 3.9 mm | 0.154 in | |||||
Texas Instruments CD4072BE | 1 çA | 2 | 4 | 3.5 V | 11 V | OR Gate | 3.4 mA, 3.4 mA | 90 ns | 1.5 V | 4 V | Through Hole | 14-DIP | -55 °C | 125 °C | 18 V | 3 V | 7.62 mm | 0.3 in |
Description
General part information
CD4072 Series
CD4071B, CD4072B and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates.
The CD4071B, CD4072B, and CD4075B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes) and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4071B, CD4072B and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates.
Documents
Technical documentation and resources
No documents available