CD74HC4514M
ActiveHIGH SPEED CMOS LOGIC 4-TO-16 LINE DECODER/DEMULTIPLEXER WITH INPUT LATCHES
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CD74HC4514M
ActiveHIGH SPEED CMOS LOGIC 4-TO-16 LINE DECODER/DEMULTIPLEXER WITH INPUT LATCHES
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Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | CD74HC4514M | 74HC4514 Series |
|---|---|---|
| Circuit | 1 | 1 |
| Circuit [custom] | 4:16 | 4:16 |
| Current - Output High, Low | 5.2 mA, 5.2 mA | 5.2 mA |
| Independent Circuits | 1 | 1 |
| Mounting Type | Surface Mount | Through Hole, Surface Mount |
| Operating Temperature [Max] | 125 °C | 125 °C |
| Operating Temperature [Min] | -55 °C | -55 °C |
| Package / Case | 24-SOIC | 24-DIP, 24-SOIC |
| Package / Case | - | 0.3 - 7.62 mm |
| Package / Case [x] | 0.295 in | 0.295 in |
| Package / Case [y] | 7.5 mm | 7.5 mm |
| Supplier Device Package | 24-SOIC | 24-PDIP, 24-SOIC |
| Type | Decoder/Demultiplexer | Decoder/Demultiplexer |
| Voltage - Supply [Max] | 6 V | 6 V |
| Voltage - Supply [Min] | 2 V | 2 V |
| Voltage Supply Source | Single Supply | Single Supply |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
74HC4514 Series
IC DECODER/DEMUX 1X4:16 24DIP
| Part | Supplier Device Package | Current - Output High, Low | Voltage - Supply [Min] | Voltage - Supply [Max] | Voltage Supply Source | Operating Temperature [Min] | Operating Temperature [Max] | Independent Circuits | Circuit [custom] | Circuit | Type | Package / Case | Package / Case | Mounting Type | Package / Case [y] | Package / Case [x] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
24-PDIP | 5.2 mA, 5.2 mA | 2 V | 6 V | Single Supply | -55 °C | 125 °C | 1 | 4:16 | 1 | Decoder/Demultiplexer | 24-DIP | 0.3 in, 7.62 mm | Through Hole | |||
Texas Instruments CD74HC4514MThe CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded.
When Latch Enable (LE\) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads.
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded.
When Latch Enable (LE\) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads. | 24-SOIC | 5.2 mA, 5.2 mA | 2 V | 6 V | Single Supply | -55 °C | 125 °C | 1 | 4:16 | 1 | Decoder/Demultiplexer | 24-SOIC | Surface Mount | 7.5 mm | 0.295 in | |
24-SOIC | 5.2 mA, 5.2 mA | 2 V | 6 V | Single Supply | -55 °C | 125 °C | 1 | 4:16 | 1 | Decoder/Demultiplexer | 24-SOIC | Surface Mount | 7.5 mm | 0.295 in | ||
Texas Instruments CD74HC4514M96The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded.
When Latch Enable (LE\) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads.
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded.
When Latch Enable (LE\) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads. | 24-SOIC | 5.2 mA, 5.2 mA | 2 V | 6 V | Single Supply | -55 °C | 125 °C | 1 | 4:16 | 1 | Decoder/Demultiplexer | 24-SOIC | Surface Mount | 7.5 mm | 0.295 in |
Description
General part information
74HC4514 Series
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded.
When Latch Enable (LE\) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads.
The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded.
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