74HC4514 Series

High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer with Input Latches

Catalog(2 parts)

Part	Supplier Device Package	Current - Output High, Low▲▼	Voltage - Supply▲▼	Voltage - Supply▲▼	Voltage Supply Source	Operating Temperature▲▼	Operating Temperature▲▼	Independent Circuits▲▼	Circuit	Circuit▲▼	Type	Package / Case	Package / Case▲▼	Mounting Type	Package / Case▲▼	Package / Case▲▼
Texas Instruments CD74HC4514ENG4 Decoder/Demultiplexer 1 x 4:16 24-PDIP	24-PDIP	0.005200000014156103 A, 0.005200000014156103 A	2 V	6 V	Single Supply	-55 °C	125 °C	1 ul	4:16	1 ul	Decoder/Demultiplexer	24-DIP	0.007619999814778566 m, 0.007619999814778566 m	Through Hole
Texas Instruments CD74HC4514M96 Decoder/Demultiplexer 1 x 4:16 24-SOIC	24-SOIC	0.005200000014156103 A, 0.005200000014156103 A	2 V	6 V	Single Supply	-55 °C	125 °C	1 ul	4:16	1 ul	Decoder/Demultiplexer	24-SOIC		Surface Mount	0.007499999832361937 m	0.007493000011891127 m

Key Features

• Multifunction CapabilityBinary to 1-of-16 Decoder1-to-16 Line DemultiplexerFanout (Over Temperature Range)Standard Outputs . . . . . . . 10 LSTTL LoadsBus Driver Outputs . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . -55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VMultifunction CapabilityBinary to 1-of-16 Decoder1-to-16 Line DemultiplexerFanout (Over Temperature Range)Standard Outputs . . . . . . . 10 LSTTL LoadsBus Driver Outputs . . . . 15 LSTTL LoadsWide Operating Temperature Range . . . -55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5V

Description

The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded. When Latch Enable (LE\) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads. The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E\). A high on E\ inhibits selection of any output. Demultiplexing is accomplished by using the E\ input as the data input and the select inputs (A0-A3) as addresses. This E\ input also serves as a chip select when these devices are cascaded. When Latch Enable (LE\) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads.