SN74LVC112ADGVRG4

Unknown

Texas Instruments

IC FF JK TYPE DUAL 1BIT 16TVSOP

SN74LVC112ADGVRG4

Unknown

Texas Instruments

IC FF JK TYPE DUAL 1BIT 16TVSOP

Description Specifications Series Pricing CAD Documents

Description

General part information

74LVC112 Series

This dual negative-edge-triggered J-K flip-flop is designed for 1.65V to 3.6V VCC operation.

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LVC112ADGVRG4

Clock Frequency	150 MHz
Current - Output High	24 mA
Current - Output Low	24 mA
Current - Quiescent (Iq)	10 µA
Function	Set(Preset) and Reset
Input Capacitance	4.5 pF
Max CL	50 pF
Max Propagation Delay	5.9 ns
Mounting Type	Surface Mount
Number of Bits per Element	1 bits
Number of Elements	2
Operating Temperature (Max)	85 °C
Operating Temperature (Min)	-40 °C
Output Type	Complementary
Package Length	0.173 in
Package Name	16-TFSOP, 16-TVSOP
Package Width	4.4 mm
Trigger Type	Negative Edge
Type	JK Type
Voltage - Supply (Maximum)	3.6 V
Voltage - Supply (Minimum)	1.65 V

74LVC112 Series

Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset

Part	Function	Package Length	Package Name	Package Width	Max Propagation Delay	Max CL	Trigger Type	Operating Temperature (Max)	Operating Temperature (Min)	Mounting Type	Number of Bits per Element	Current - Output Low	Current - Output High	Input Capacitance	Type	Clock Frequency	Output Type	Current - Quiescent (Iq)	Voltage - Supply (Maximum)	Voltage - Supply (Minimum)	Number of Elements
Texas Instruments SN74LVC112ANS	Set(Preset) and Reset	0.209 in	16-SO 16-SOIC	5.3 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112ADR	Set(Preset) and Reset	0.154 in	16-SOIC	3.9 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112APWT	Set(Preset) and Reset	0.173 in	16-TSSOP	4.4 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112APWR	Set(Preset) and Reset	0.173 in	16-TSSOP	4.4 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112APW	Set(Preset) and Reset	0.173 in	16-TSSOP	4.4 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112AD	Set(Preset) and Reset	0.154 in	16-SOIC	3.9 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112ANSR	Set(Preset) and Reset	0.209 in	16-SO 16-SOIC	5.3 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112ADGVRG4	Set(Preset) and Reset	0.173 in	16-TFSOP 16-TVSOP	4.4 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112ADT	Set(Preset) and Reset	0.154 in	16-SOIC	3.9 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2
Texas Instruments SN74LVC112ADGVR	Set(Preset) and Reset	0.173 in	16-TFSOP 16-TVSOP	4.4 mm	5.9 ns	50 pF	Negative Edge	85 °C	-40 °C	Surface Mount	1 bits	24 mA	24 mA	4.5 pF	JK Type	150 MHz	Complementary	10 µA	3.6 V	1.65 V	2

Pricing

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CAD

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Documents

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SN74LVC112ADGVRG4 | Datasheet