Technical Specifications
Parameters and characteristics commom to parts in this series
Specification | TPS3836K33DBVTG4 | TPS3836 Series |
---|---|---|
Grade | - | Automotive |
Mounting Type | Surface Mount | Surface Mount |
Number of Voltages Monitored | 1 | 1 |
Operating Temperature [Max] | 85 °C | 85 - 125 °C |
Operating Temperature [Min] | -40 °C | -55 - -40 °C |
Output | Totem Pole, Push-Pull | Totem Pole, Push-Pull |
Package / Case | SOT-753, SC-74A | SOT-753, SC-74A |
Qualification | - | AEC-Q100 |
Reset | Active Low | Active Low |
Reset Timeout | - | 5 ms |
Supplier Device Package | SOT-23-5 | SOT-23-5 |
Type | Simple Reset/Power-On Reset | Simple Reset/Power-On Reset |
Voltage - Threshold | 2.93 V | 1.71 - 2.93 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
TPS3836 Series
Active-low, push-pull, nano-power supervisors with manual reset
Part | Type | Operating Temperature [Max] | Operating Temperature [Min] | Mounting Type | Number of Voltages Monitored | Reset | Output | Supplier Device Package | Voltage - Threshold | Package / Case | Reset Timeout [Min] | Qualification | Grade |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments TPS3836H30DBVTThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.79 V | SC-74A, SOT-753 | |||
Texas Instruments TPS3836E18DBVRThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 1.71 V | SC-74A, SOT-753 | |||
Texas Instruments TPS3836K33DBVTThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.93 V | SC-74A, SOT-753 | |||
Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.64 V | SC-74A, SOT-753 | ||||
Texas Instruments TPS3836J25MDBVTEPThe TPS3836, TPS3837, TPS3838 families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processing (DSP) and processor-based systems.
During power on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keepsRESEToutput active as long as VDDremains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDhas risen above VIT.
When CT is connected to GND, a fixed delay time of typical 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms.
When the supply voltage drops below VIT, the output becomes active (low) again.
All the devices of this family have a fixed-sense VITset by an internal voltage divider.
The TPS3836 has an active-low push-pullRESEToutput. The TPS3837 has active-high push-pull RESET, and the TPS3838 integrates an active-low open-drainRESEToutput.
The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3 V, and 3.3 V. The circuits are available in a 5-pin SOT-23 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –55°C to 125°C.
The TPS3836, TPS3837, TPS3838 families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processing (DSP) and processor-based systems.
During power on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keepsRESEToutput active as long as VDDremains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDhas risen above VIT.
When CT is connected to GND, a fixed delay time of typical 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms.
When the supply voltage drops below VIT, the output becomes active (low) again.
All the devices of this family have a fixed-sense VITset by an internal voltage divider.
The TPS3836 has an active-low push-pullRESEToutput. The TPS3837 has active-high push-pull RESET, and the TPS3838 integrates an active-low open-drainRESEToutput.
The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3 V, and 3.3 V. The circuits are available in a 5-pin SOT-23 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –55°C to 125°C. | Simple Reset/Power-On Reset | 125 °C | -55 C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.25 V | SC-74A, SOT-753 | 5 ms | ||
Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.93 V | SC-74A, SOT-753 | ||||
Texas Instruments TPS3836E18DBVTThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 1.71 V | SC-74A, SOT-753 | |||
Simple Reset/Power-On Reset | 125 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.64 V | SC-74A, SOT-753 | AEC-Q100 | Automotive | ||
Texas Instruments TPS3836J25DBVRThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.25 V | SC-74A, SOT-753 | |||
Texas Instruments TPS3836K33DBVRThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.93 V | SC-74A, SOT-753 | |||
Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.64 V | SC-74A, SOT-753 | ||||
Texas Instruments TPS3836L30DBVTThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.64 V | SC-74A, SOT-753 | |||
Simple Reset/Power-On Reset | 125 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 1.71 V | SC-74A, SOT-753 | AEC-Q100 | Automotive | ||
Simple Reset/Power-On Reset | 125 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.93 V | SC-74A, SOT-753 | AEC-Q100 | Automotive | ||
Texas Instruments TPS3836H30DBVRThe TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C.
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3836 has an active-low, push-pullRESEToutput. The TPS3837 has an active-high, push-pull RESET, and the TPS3838 integrates an active-low, open-drainRESEToutput. The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3.0 V, and 3.3 V. The circuits are available in either a SOT23-5 or a 2-mm × 2-mm SON-6 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –40°C to 85°C. | Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.79 V | SC-74A, SOT-753 | |||
Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.93 V | SC-74A, SOT-753 | ||||
Simple Reset/Power-On Reset | 125 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.79 V | SC-74A, SOT-753 | AEC-Q100 | Automotive | ||
Texas Instruments TPS3836L30MDBVREPThe TPS3836, TPS3837, TPS3838 families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processing (DSP) and processor-based systems.
During power on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keepsRESEToutput active as long as VDDremains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDhas risen above VIT.
When CT is connected to GND, a fixed delay time of typical 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms.
When the supply voltage drops below VIT, the output becomes active (low) again.
All the devices of this family have a fixed-sense VITset by an internal voltage divider.
The TPS3836 has an active-low push-pullRESEToutput. The TPS3837 has active-high push-pull RESET, and the TPS3838 integrates an active-low open-drainRESEToutput.
The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3 V, and 3.3 V. The circuits are available in a 5-pin SOT-23 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –55°C to 125°C.
The TPS3836, TPS3837, TPS3838 families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processing (DSP) and processor-based systems.
During power on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keepsRESEToutput active as long as VDDremains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDhas risen above VIT.
When CT is connected to GND, a fixed delay time of typical 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms.
When the supply voltage drops below VIT, the output becomes active (low) again.
All the devices of this family have a fixed-sense VITset by an internal voltage divider.
The TPS3836 has an active-low push-pullRESEToutput. The TPS3837 has active-high push-pull RESET, and the TPS3838 integrates an active-low open-drainRESEToutput.
The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3 V, and 3.3 V. The circuits are available in a 5-pin SOT-23 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a temperature range of –55°C to 125°C. | Simple Reset/Power-On Reset | 125 °C | -55 C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.64 V | SC-74A, SOT-753 | 5 ms | ||
Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 1.71 V | SC-74A, SOT-753 | ||||
Simple Reset/Power-On Reset | 85 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.64 V | SC-74A, SOT-753 | ||||
Simple Reset/Power-On Reset | 125 °C | -40 °C | Surface Mount | 1 | Active Low | Push-Pull, Totem Pole | SOT-23-5 | 2.25 V | SC-74A, SOT-753 | AEC-Q100 | Automotive |
Description
General part information
TPS3836 Series
The TPS3836, TPS3837, and TPS3838 device families of supervisory circuits provide circuit initialization and timing supervision, primarily for digital signal processors (DSP) and processor-based systems.
During power-on,RESETis asserted when the supply voltage VDDbecomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDDand keeps theRESEToutput active as long as VDDremains below the threshold voltage of VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time starts after VDDrises above the threshold voltage VIT.
When CT is connected to GND, a fixed delay time of typically 10 ms is asserted. When connected to VDD, the delay time is typically 200 ms. When the supply voltage drops below the threshold voltage VIT, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.