Texas Instruments

The CD74HC4543 high-speed silicon-gate device is a BCD to 7-segment latch/decoder/driver designed primarily for directly driving liquid-crystal displays. It has an active-high disable input (LD), an active-high blanking input (BI) and a phase input (PH) to which a square wave is applied for liquid-crystal applications. This square wave also is... Read More

High Speed CMOS Logic Octal Positive-Edge-Triggered Inverting D-Type Flip-Flops with 3-State Outputs

8-ch, 2-V to 6-V inverters with 3-state outputs

8-ch, 2-V to 6-V buffers with 3-state outputs

The ’HC533, ’HCT533, ’HC563, and CD74HCT563 are high speed Octal Transparent Latches manufactured with silicon gate CMOS technology. They possess the low power con-sumption of standard CMOS integrated circuits, as well as the ability to drive 15 LSTTL devices. The outputs are transparent to the inputs when the latch enable... Read More

High Speed CMOS Logic Octal Positive-Edge-Triggered Inverting D-Type Flip-Flops with 3-State Outputs

High Speed CMOS Logic Octal Transparent Latches with 3-State Outputs

High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs

8-Bit Shift Registers With 3-State Output Registers

The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL\)... Read More

High Speed CMOS Logic Octal Inverting Bus Transceivers with 3-State Outputs

The ’HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine... Read More

8-Bit Identity/Magnitude Comparators (P=Q) with Enable

The CD74HC7046A and CD74HCT7046A high-speed silicon-gate CMOS devices, specified in compliance with JEDEC Standard No. 7A, are phase-locked-loop (PLL) circuits that contain a linear voltage-controlled oscillator (VCO), two-phase comparators (PC1, PC2), and a lock detector. A signal input and a comparator input are common to each comparator. The lock detector... Read More

This device contains four independent 2-input XNOR gates. Each gate performs the Boolean function Y =A ⊕ Bin positive logic. This device contains four independent 2-input XNOR gates. Each gate performs the Boolean function Y =A ⊕ Bin positive logic.

High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset

The CDx4HC74 devices contain two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear pins for each. The CDx4HC74 devices contain two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear pins for each.

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\... Read More

4-Bit Magnitude Comparator

This device contains four independent 2-input XOR gates. Each gate performs the Boolean function Y = A ⊕ B in positive logic. This device contains four independent 2-input XOR gates. Each gate performs the Boolean function Y = A ⊕ B in positive logic.