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CD74HC75 Series

High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latches

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latches

PartCurrent - Output High, LowMounting TypeLogic TypeOutput TypeVoltage - Supply [Min]Voltage - Supply [Max]Independent CircuitsCircuitSupplier Device PackageDelay Time - PropagationPackage / CasePackage / CaseOperating Temperature [Min]Operating Temperature [Max]Package / Case [x]Package / Case [x]
Texas Instruments
CD74HC75M96
5.2 mA, 5.2 mA
Surface Mount
D-Type Transparent Latch
Differential
2 V
6 V
2
2:2
16-SOIC
10 ns
16-SOIC
0.154 in, 3.9 mm Width
-55 °C
125 °C
Texas Instruments
CD74HC75PWT
5.2 mA, 5.2 mA
Surface Mount
D-Type Transparent Latch
Differential
2 V
6 V
2
2:2
16-TSSOP
10 ns
16-TSSOP
-55 °C
125 °C
0.173 "
4.4 mm
Texas Instruments
CD74HC75MT
5.2 mA, 5.2 mA
Surface Mount
D-Type Transparent Latch
Differential
2 V
6 V
2
2:2
16-SOIC
10 ns
16-SOIC
0.154 in, 3.9 mm Width
-55 °C
125 °C
Texas Instruments
CD74HC75E
5.2 mA, 5.2 mA
Through Hole
D-Type Transparent Latch
Differential
2 V
6 V
2
2:2
16-PDIP
10 ns
16-DIP
0.3 in, 7.62 mm
-55 °C
125 °C
Texas Instruments
CD74HC75PWR
5.2 mA, 5.2 mA
Surface Mount
D-Type Transparent Latch
Differential
2 V
6 V
2
2:2
16-TSSOP
10 ns
16-TSSOP
-55 °C
125 °C
0.173 "
4.4 mm
Texas Instruments
CD74HC75M
5.2 mA, 5.2 mA
Surface Mount
D-Type Transparent Latch
Differential
2 V
6 V
2
2:2
16-SOIC
10 ns
16-SOIC
0.154 in, 3.9 mm Width
-55 °C
125 °C
Texas Instruments
CD74HC75PW
5.2 mA, 5.2 mA
Surface Mount
D-Type Transparent Latch
Differential
2 V
6 V
2
2:2
16-TSSOP
10 ns
16-TSSOP
-55 °C
125 °C
0.173 "
4.4 mm

Key Features

• True and Complementary OutputsBuffered Inputs and OutputsFanout (Over Temperature Range)Standard Outputs...10 LSTTL LoadsBus Driver Outputs...15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHData sheet acquired from Harris SemiconductorTrue and Complementary OutputsBuffered Inputs and OutputsFanout (Over Temperature Range)Standard Outputs...10 LSTTL LoadsBus Driver Outputs...15 LSTTL LoadsWide Operating Temperature Range . . . –55°C to 125°CBalanced Propagation Delay and Transition TimesSignificant Power Reduction Compared to LSTTL Logic ICsHC Types2V to 6V OperationHigh Noise Immunity: NIL= 30%, NIH= 30% of VCCat VCC= 5VHCT Types4.5V to 5.5V OperationDirect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH= 2V (Min)CMOS Input Compatibility, Il1µA at VOL, VOHData sheet acquired from Harris Semiconductor

Description

AI
The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected. The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.