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CD4023B Series

Three-channel 3-input 3V-to-18V NAND gate

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

Three-channel 3-input 3V-to-18V NAND gate

PartInput Logic Level - High [Min]Input Logic Level - High [Max]Logic TypePackage / CasePackage / CasePackage / CaseMax Propagation Delay @ V, Max CLNumber of InputsMounting TypeNumber of CircuitsVoltage - Supply [Max]Voltage - Supply [Min]Operating Temperature [Min]Operating Temperature [Max]Input Logic Level - Low [Min]Input Logic Level - Low [Max]Current - Output High, LowCurrent - Quiescent (Max) [Max]Package / Case [custom]Package / Case [custom]Supplier Device PackagePackage / Case [y]Package / Case [y]
Texas Instruments
CD4023BM96
3.5 V
11 V
NAND Gate
3.9 mm
0.154 in
14-SOIC
90 ns
3
Surface Mount
3
18 V
3 V
-55 °C
125 °C
1.5 V
4 V
3.4 mA, 3.4 mA
1 çA
Texas Instruments
CD4023BPW
3.5 V
11 V
NAND Gate
14-TSSOP
90 ns
3
Surface Mount
3
18 V
3 V
-55 °C
125 °C
1.5 V
4 V
3.4 mA, 3.4 mA
1 çA
0.173 in
4.4 mm
14-TSSOP
Texas Instruments
CD4023BMT
3.5 V
11 V
NAND Gate
3.9 mm
0.154 in
14-SOIC
90 ns
3
Surface Mount
3
18 V
3 V
-55 °C
125 °C
1.5 V
4 V
3.4 mA, 3.4 mA
1 çA
Texas Instruments
CD4023BM
3.5 V
11 V
NAND Gate
3.9 mm
0.154 in
14-SOIC
90 ns
3
Surface Mount
3
18 V
3 V
-55 °C
125 °C
1.5 V
4 V
3.4 mA, 3.4 mA
1 çA
Texas Instruments
CD4023BNSR
3.5 V
11 V
NAND Gate
14-SOIC
90 ns
3
Surface Mount
3
18 V
3 V
-55 °C
125 °C
1.5 V
4 V
3.4 mA, 3.4 mA
1 çA
14-SO
5.3 mm
0.209 in
Texas Instruments
CD4023BPWR
3.5 V
11 V
NAND Gate
14-TSSOP
90 ns
3
Surface Mount
3
18 V
3 V
-55 °C
125 °C
1.5 V
4 V
3.4 mA, 3.4 mA
1 çA
0.173 in
4.4 mm
14-TSSOP
Texas Instruments
CD4023BE
3.5 V
11 V
NAND Gate
7.62 mm
0.3 in
14-DIP
90 ns
3
Through Hole
3
18 V
3 V
-55 °C
125 °C
1.5 V
4 V
3.4 mA, 3.4 mA
1 çA

Key Features

• Propagation delay time = 60 ns (typ.) at CL= 50 pF, VDD= 10 VBuffered inputs and outputsStandardized symmetrical output characteristicsMaximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C100% tested for quiescent current at 20 V5-V, 10-V, and 15-V parametric ratingsNoise margin (over full package temperature range:1 V at VDD= 5 V2 V at VDD= 10 V2.5 at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"Quad 2 Input—CD4011BDual 4 Input—CD4012BTriple 3 Input—CD4023BData sheet acquired from Harris Semiconductor.Propagation delay time = 60 ns (typ.) at CL= 50 pF, VDD= 10 VBuffered inputs and outputsStandardized symmetrical output characteristicsMaximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C100% tested for quiescent current at 20 V5-V, 10-V, and 15-V parametric ratingsNoise margin (over full package temperature range:1 V at VDD= 5 V2 V at VDD= 10 V2.5 at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"Quad 2 Input—CD4011BDual 4 Input—CD4012BTriple 3 Input—CD4023BData sheet acquired from Harris Semiconductor.

Description

AI
CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix). CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix).