DRV8770 Series
100V H-bridge gate driver
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
100V H-bridge gate driver
| Part | Voltage - Supply [Max] | Voltage - Supply [Min] | Mounting Type | Fault Protection | Operating Temperature [Max] | Operating Temperature [Min] | Current - Output / Channel | Applications | Interface | Supplier Device Package | Package / Case | Current - Peak Output | Voltage - Load [Max] | Voltage - Load [Min] | Technology | Load Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments DRV8770RGER | 20 V | 5 V | Surface Mount | Shoot-Through | 150 C | -40 °C | 1.5 A | DC Motors, General Purpose | Analog, Logic, PWM | 24-VQFN (4x4) | 24-VFQFN Exposed Pad | 1.5 A | 20 V | 5 V | NMOS, Power MOSFET | Capacitive, Inductive, Resistive |
Key Features
• 100-V H-bridge gate driverDrives N-channel MOSFETs (NMOS)Gate driver supply (GVDD): 5-20 VMOSFET supply (SHx) support up to 100 VIntegrated bootstrap diodesSupports inverting and non-inverting INLx inputs (QFN package)Bootstrap gate drive architecture750-mA source current1.5-A Sink currentSupports up to 15s battery powered applicationsLow leakage current on SHx pins (<55 µA)Absolute maximum BSTx voltage upto 115-VSupports negative transients down to -22 V on SHx pinsAdjustable deadtime through DT pin in QFN packageFixed Deadtime insertion of 200 ns in TSSOP packageSupports 3.3-V, and 5-V logic inputs with 20-V abs max4-ns typical propogation delay matchingCompact QFN and TSSOP packages and footprintsEfficient system design withPower BlocksIntegrated protection featuresBST undervoltage lockout (BSTUV)GVDD undervoltage (GVDDUV)100-V H-bridge gate driverDrives N-channel MOSFETs (NMOS)Gate driver supply (GVDD): 5-20 VMOSFET supply (SHx) support up to 100 VIntegrated bootstrap diodesSupports inverting and non-inverting INLx inputs (QFN package)Bootstrap gate drive architecture750-mA source current1.5-A Sink currentSupports up to 15s battery powered applicationsLow leakage current on SHx pins (<55 µA)Absolute maximum BSTx voltage upto 115-VSupports negative transients down to -22 V on SHx pinsAdjustable deadtime through DT pin in QFN packageFixed Deadtime insertion of 200 ns in TSSOP packageSupports 3.3-V, and 5-V logic inputs with 20-V abs max4-ns typical propogation delay matchingCompact QFN and TSSOP packages and footprintsEfficient system design withPower BlocksIntegrated protection featuresBST undervoltage lockout (BSTUV)GVDD undervoltage (GVDDUV)
Description
AI
The DRV8770 device provides two half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The integrated bootstrap diode and external capacitor generate the correct gate drive voltages for the high-side MOSFETs while the GVDD drives the gates of the low-side MOSFETs. The gate drive architecture supports gate drive currents up to 750-mA source and 1.5-A sink.
The high voltage tolerance of the gate drive pins improves system robustness. The SHx phase pins can tolerate significant negative voltage transients, while the high-side gate driver supply can support higher positive voltage transients (115-V absolute maximum) on the BSTx and GHx pins. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high side through GVDD and BST undervoltage lockout.
The DRV8770 device provides two half-bridge gate drivers, each capable of driving high-side and low-side N-channel power MOSFETs. The integrated bootstrap diode and external capacitor generate the correct gate drive voltages for the high-side MOSFETs while the GVDD drives the gates of the low-side MOSFETs. The gate drive architecture supports gate drive currents up to 750-mA source and 1.5-A sink.
The high voltage tolerance of the gate drive pins improves system robustness. The SHx phase pins can tolerate significant negative voltage transients, while the high-side gate driver supply can support higher positive voltage transients (115-V absolute maximum) on the BSTx and GHx pins. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high side through GVDD and BST undervoltage lockout.