ADC08DJ3200 Series
8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (ADC)
Manufacturer: Texas Instruments
Catalog(1 parts)
| Part | Data Interface | Input Type | Number of Inputs▲▼ | Voltage - Supply, Digital▲▼ | Voltage - Supply, Digital▲▼ | Architecture | Supplier Device Package | Ratio - S/H:ADC | Number of Bits▲▼ | Configuration | Mounting Type | Package / Case | Reference Type | Features | Operating Temperature▲▼ | Operating Temperature▲▼ | Sampling Rate (Per Second)▲▼ | Voltage - Supply, Analog▲▼ | Voltage - Supply, Analog▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments ADC08DJ3200AAVT8 Bit Analog to Digital Converter 2 Input Folding Interpolating 144-FCBGA (10x10) | JESD204B, Serial | Differential, Single Ended | 2 ul | 1.149999976158142 V | 1.0499999523162842 V | Folding Interpolating | 144-FCBGA (10x10) | 0:1 | 8 ul | MUX-ADC | Surface Mount | 144-FBGA, FCBGA | Internal | Temperature Sensor | -40 °C | 85 °C | 3200000000 Ω, 6400000000 Ω | 1.149999976158142 V, 2 V | 1.0499999523162842 V, 1.7999999523162842 V |
Key Features
• ADC core:8-bit resolutionUp to 6.4 GSPS in single-channel modeUp to 3.2 GSPS in dual-channel modePerformance specifications (fIN= 997 MHz):ENOB: 7.8 bitsSFDR:Dual-channel mode: 67 dBFSSingle-channel mode: 62 dBFSBuffered analog inputs with VCMIof 0 V:Analog input bandwidth (–3 dB): 8.0 GHzUsable input frequency range: >10 GHzFull-scale input voltage (VFS, default): 0.8 VPPAnalog input common-mode (VICM): 0 VNoiseless aperture delay (TAD) adjustment:Precise sampling control: 19-fs stepSimplifies synchronization and interleavingTemperature and voltage invariant delaysEasy-to-use synchronization features:Automatic SYSREF timing calibrationTimestamp for sample markingJESD204B serial data interface:Supports subclass 0 and 1Maximum lane rate: 12.8 GbpsUp to 16 lanes allows reduced lane ratePower consumption: 2.8 WPower supplies: 1.1 V, 1.9 VADC core:8-bit resolutionUp to 6.4 GSPS in single-channel modeUp to 3.2 GSPS in dual-channel modePerformance specifications (fIN= 997 MHz):ENOB: 7.8 bitsSFDR:Dual-channel mode: 67 dBFSSingle-channel mode: 62 dBFSBuffered analog inputs with VCMIof 0 V:Analog input bandwidth (–3 dB): 8.0 GHzUsable input frequency range: >10 GHzFull-scale input voltage (VFS, default): 0.8 VPPAnalog input common-mode (VICM): 0 VNoiseless aperture delay (TAD) adjustment:Precise sampling control: 19-fs stepSimplifies synchronization and interleavingTemperature and voltage invariant delaysEasy-to-use synchronization features:Automatic SYSREF timing calibrationTimestamp for sample markingJESD204B serial data interface:Supports subclass 0 and 1Maximum lane rate: 12.8 GbpsUp to 16 lanes allows reduced lane ratePower consumption: 2.8 WPower supplies: 1.1 V, 1.9 V
Description
AI
The ADC08DJ3200 device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10 GHz. In dual-channel mode, the ADC08DJ3200 can sample up to 3200 MSPS and up to 6400 MSPS in single-channel mode. Programmable tradeoffs in channel count (dual-channel mode) and Nyquist bandwidth (single-channel mode) allow development of flexible hardware that meets the needs of both high channel count or wide instantaneous signal bandwidth applications. Full-power input bandwidth (–3 dB) of 8.0 GHz, with usable frequencies exceeding the –3-dB point in both dual- and single-channel modes, allows direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.
The ADC08DJ3200 uses a high-speed JESD204B output interface with up to 16 serialized lanes and subclass-1 compliance for deterministic latency and multi-device synchronization. The serial output lanes support up to 12.8 Gbps and can be configured to trade-off bit rate and number of lanes. At 5 GSPS, only four total lanes are required running at 12.5 Gbps or 16 lanes can be used to reduce the lane rate to 3.125 Gbps. Innovative synchronization features, including noiseless aperture delay (TAD) adjustment and SYSREF windowing, simplify system design for phased array radar and MIMO communications.
The ADC08DJ3200 device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10 GHz. In dual-channel mode, the ADC08DJ3200 can sample up to 3200 MSPS and up to 6400 MSPS in single-channel mode. Programmable tradeoffs in channel count (dual-channel mode) and Nyquist bandwidth (single-channel mode) allow development of flexible hardware that meets the needs of both high channel count or wide instantaneous signal bandwidth applications. Full-power input bandwidth (–3 dB) of 8.0 GHz, with usable frequencies exceeding the –3-dB point in both dual- and single-channel modes, allows direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.
The ADC08DJ3200 uses a high-speed JESD204B output interface with up to 16 serialized lanes and subclass-1 compliance for deterministic latency and multi-device synchronization. The serial output lanes support up to 12.8 Gbps and can be configured to trade-off bit rate and number of lanes. At 5 GSPS, only four total lanes are required running at 12.5 Gbps or 16 lanes can be used to reduce the lane rate to 3.125 Gbps. Innovative synchronization features, including noiseless aperture delay (TAD) adjustment and SYSREF windowing, simplify system design for phased array radar and MIMO communications.