CDCLVD1213 Series
Low jitter, 1:4 universal-to-LVDS buffer with selectable output divider
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Low jitter, 1:4 universal-to-LVDS buffer with selectable output divider
| Part | Supplier Device Package | Output | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Operating Temperature [Min] | Operating Temperature [Max] | Voltage - Supply [Min] | Voltage - Supply [Max] | Type | Package / Case | Frequency - Max [Max] | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Number of Circuits | Mounting Type | Supplied Contents | Utilized IC / Part | Function | Embedded |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments CDCLVD1213RGTR | 16-VQFN (3x3) | LVDS | -40 °C | 85 °C | 2.375 V | 2.625 V | Fanout Buffer (Distribution), Divider | 16-VFQFN Exposed Pad | 800 MHz | 4 | 1 | 1 | Surface Mount | ||||||
Texas Instruments CDCLVD1213RGTT | 16-VQFN (3x3) | LVDS | -40 °C | 85 °C | 2.375 V | 2.625 V | Fanout Buffer (Distribution), Divider | 16-VFQFN Exposed Pad | 800 MHz | 4 | 1 | 1 | Surface Mount | ||||||
Texas Instruments CDCLVD1213EVM | Timing | Board(s) | CDCLVD1213 | Clock Buffer |
Key Features
• 1:4 Differential BufferLow Additive Jitter: < 300-fs RMS in 10-kHz to 20-MHzLow Output Skew of 20 ps (Maximum)Selectable Divider Ratio 1, /2, /4Universal Input Accepts LVDS, LVPECL, and CML4 LVDS Outputs, ANSI EIA/TIA-644A Standard CompatibleClock Frequency: Up to 800 MHzDevice Power Supply: 2.375 V to 2.625 VIndustrial Temperature Range: –40°C to 85°CPackaged in 3 mm × 3 mm, 16-Pin VQFN (RGT)ESD Protection Exceeds 3-kV HBM, 1-kV CDMAPPLICATIONSTelecommunications and NetworkingMedical ImagingTest and Measurement EquipmentWireless CommunicationsGeneral-Purpose Clocking1:4 Differential BufferLow Additive Jitter: < 300-fs RMS in 10-kHz to 20-MHzLow Output Skew of 20 ps (Maximum)Selectable Divider Ratio 1, /2, /4Universal Input Accepts LVDS, LVPECL, and CML4 LVDS Outputs, ANSI EIA/TIA-644A Standard CompatibleClock Frequency: Up to 800 MHzDevice Power Supply: 2.375 V to 2.625 VIndustrial Temperature Range: –40°C to 85°CPackaged in 3 mm × 3 mm, 16-Pin VQFN (RGT)ESD Protection Exceeds 3-kV HBM, 1-kV CDMAPPLICATIONSTelecommunications and NetworkingMedical ImagingTest and Measurement EquipmentWireless CommunicationsGeneral-Purpose Clocking
Description
AI
The CDCLVD1213 clock buffer distributes an input clock to 4 pairs of differential LVDS clock outputs with low additive jitter for clock distribution. The input can either be LVDS, LVPECL, or CML.
The CDCLVD1213 contains a high performance divider for one output (QD) which can divide the input clock signal by a factor of 1, 2, or 4.
The CDCLVD1213 is specifically designed for driving 50-Ω transmission lines. The part supports a fail-safe function. The device incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.
The device operates in 2.5-V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD1213 is packaged in small, 16-pin, 3-mm × 3-mm VQFN package.
The CDCLVD1213 clock buffer distributes an input clock to 4 pairs of differential LVDS clock outputs with low additive jitter for clock distribution. The input can either be LVDS, LVPECL, or CML.
The CDCLVD1213 contains a high performance divider for one output (QD) which can divide the input clock signal by a factor of 1, 2, or 4.
The CDCLVD1213 is specifically designed for driving 50-Ω transmission lines. The part supports a fail-safe function. The device incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.
The device operates in 2.5-V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD1213 is packaged in small, 16-pin, 3-mm × 3-mm VQFN package.