ADC32RF55 Series
Dual-channel 14-bit 3-GSPS RF-sampling ADC with low noise spectral density (NSD)
Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/
Catalog
Dual-channel 14-bit 3-GSPS RF-sampling ADC with low noise spectral density (NSD)
| Part | Supplier Device Package | Number of Bits | Configuration | Reference Type | Input Type | Operating Temperature [Max] | Operating Temperature [Min] | Mounting Type | Voltage - Supply, Analog [Max] | Voltage - Supply, Analog [Min] | Number of Inputs | Number of A/D Converters | Voltage - Supply, Digital [Min] | Voltage - Supply, Digital [Max] | Ratio - S/H:ADC | Sampling Rate (Per Second) | Data Interface | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments ADC32RF55IRTDT | 64-VQFN (9x9) | 14 | MUX-ADC | External | Single Ended | 85 °C | -40 °C | Surface Mount, Wettable Flank | 1.225 V, 1.85 V | 1.175 V, 1.75 V | 4 | 4 | 1.175 V | 1.225 V | 0:4 | 3 G | Serial, SPI | 64-VFQFN Exposed Pad |
Texas Instruments ADC32RF55IRTD | 64-VQFN (9x9) | 14 | MUX-ADC | External | Single Ended | 85 °C | -40 °C | Surface Mount, Wettable Flank | 1.225 V, 1.85 V | 1.175 V, 1.75 V | 4 | 4 | 1.175 V | 1.225 V | 0:4 | 3 G | Serial, SPI | 64-VFQFN Exposed Pad |
Key Features
• 14-Bit, dual channel 2.6 to 3-GSPS ADCNoise spectral density:NSD = -155.6 dBFS/Hz (no AVG)NSD = -158.1 dBFS/Hz (2x AVG)NSD = -160.4 dBFS/Hz (4x AVG)Single core (non-interleaved) ADC architectureAperture jitter: 50 fsLow close-in residual phase noise:-127 dBc/Hz at 10 kHz offsetSpectral performance (f IN = 1 GHz, -4 dBFS):2x internal averagingSNR: 62.3 dBFSSFDR HD2,3: 63 dBcSFDR worst spur: 85 dBFSSpectral performance (f IN = 1.8 GHz, -4 dBFS):2x internal averagingSNR: 63 dBFSSFDR HD2,3: 68 dBcSFDR worst spur: 86 dBFSInput fullscale: 1.1 to 1.35 Vpp (2 to 3.5 dBm)Code error rate (CER): 10 -15Full power input bandwidth (-3 dB): 2.75 GHzJESD204B serial data interfaceMaximum lane rate: 13 GbpsSupports subclass 1 deterministic latencyDigital down-convertersUp to four DDC per ADC channelComplex output: 4x to 128x decimation48-bit NCO phase coherent frequency hoppingFast frequency hopping: < 1 usPower consumption: 2.6 W/channel (2x AVG)Power supplies: 1.8 V, 1.2 V14-Bit, dual channel 2.6 to 3-GSPS ADCNoise spectral density:NSD = -155.6 dBFS/Hz (no AVG)NSD = -158.1 dBFS/Hz (2x AVG)NSD = -160.4 dBFS/Hz (4x AVG)Single core (non-interleaved) ADC architectureAperture jitter: 50 fsLow close-in residual phase noise:-127 dBc/Hz at 10 kHz offsetSpectral performance (f IN = 1 GHz, -4 dBFS):2x internal averagingSNR: 62.3 dBFSSFDR HD2,3: 63 dBcSFDR worst spur: 85 dBFSSpectral performance (f IN = 1.8 GHz, -4 dBFS):2x internal averagingSNR: 63 dBFSSFDR HD2,3: 68 dBcSFDR worst spur: 86 dBFSInput fullscale: 1.1 to 1.35 Vpp (2 to 3.5 dBm)Code error rate (CER): 10 -15Full power input bandwidth (-3 dB): 2.75 GHzJESD204B serial data interfaceMaximum lane rate: 13 GbpsSupports subclass 1 deterministic latencyDigital down-convertersUp to four DDC per ADC channelComplex output: 4x to 128x decimation48-bit NCO phase coherent frequency hoppingFast frequency hopping: < 1 usPower consumption: 2.6 W/channel (2x AVG)Power supplies: 1.8 V, 1.2 V
Description
AI
The ADC32RF5x is a single core 14-bit, 2.6 GSPS to 3 GSPS, dual channel analog to digital converters (ADC) that supports RF sampling with input frequencies up to 3 GHz. The design maximizes signal-to-noise ratio (SNR) and delivers a noise spectral density of -155 dBFS/Hz. Using additional internal ADCs along with on-chip signal averaging, the noise density improves to -161 dBFS/Hz.
Each ADC channel can be connected to a quad-band digital down-converter (DDC) using a 48-bit NCO which supports phase coherent frequency hopping. Using the GPIO pins for NCO frequency control, frequency hopping can be achieved in less than 1 µs.
The ADC32RF54 and ADC32RF55 supports the JESD204B serial data interface with subclass 1 deterministic latency using data rates up to 13 Gbps.
The power efficient ADC architecture consumes 2.1 W/ch at 3 Gsps and provides power scaling with lower sampling rates.
The ADC32RF5x is a single core 14-bit, 2.6 GSPS to 3 GSPS, dual channel analog to digital converters (ADC) that supports RF sampling with input frequencies up to 3 GHz. The design maximizes signal-to-noise ratio (SNR) and delivers a noise spectral density of -155 dBFS/Hz. Using additional internal ADCs along with on-chip signal averaging, the noise density improves to -161 dBFS/Hz.
Each ADC channel can be connected to a quad-band digital down-converter (DDC) using a 48-bit NCO which supports phase coherent frequency hopping. Using the GPIO pins for NCO frequency control, frequency hopping can be achieved in less than 1 µs.
The ADC32RF54 and ADC32RF55 supports the JESD204B serial data interface with subclass 1 deterministic latency using data rates up to 13 Gbps.
The power efficient ADC architecture consumes 2.1 W/ch at 3 Gsps and provides power scaling with lower sampling rates.