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DAC5681 Series

16-Bit, 1.0-GSPS Digital-to-Analog Converter (DAC)

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

16-Bit, 1.0-GSPS Digital-to-Analog Converter (DAC)

PartSampling Rate (Per Second)Data InterfaceUtilized IC / PartSupplied ContentsSettling TimeDAC TypeNumber of BitsNumber of DAC'sOutput TypeVoltage - Supply, Digital [Max]Voltage - Supply, Digital [Min]Package / CaseDifferential OutputMounting TypeINL/DNL (LSB)Supplier Device PackageOperating Temperature [Min]Operating Temperature [Max]Reference TypeArchitectureVoltage - Supply, Analog [Max]Voltage - Supply, Analog [Min]
Texas Instruments
DAC5681ZEVM
1 G
LVDS - Parallel, LVDS - Serial
DAC5681Z
Board(s)
10.4 ns
Current
16 bits
1
Texas Instruments
DAC5681IRGC25
LVDS - Parallel
10.4 ns
16 bits
Current - Unbuffered
2.15 V
1.71 V
64-VFQFN Exposed Pad
Surface Mount
±2, ±4
64-VQFN (9x9)
-40 °C
85 °C
External, Internal
Current Sink
3.6 V
3 V
Texas Instruments
DAC5681IRGCT
LVDS - Parallel
10.4 ns
16 bits
Current - Unbuffered
2.15 V
1.71 V
64-VFQFN Exposed Pad
Surface Mount
±2, ±4
64-VQFN (9x9)
-40 °C
85 °C
External, Internal
Current Sink
3.6 V
3 V
Texas Instruments
DAC5681ZIRGCT
LVDS - Parallel
10.4 ns
16 bits
Current - Unbuffered
1.9 V
1.7 V
64-VFQFN Exposed Pad
Surface Mount
±2, ±4
64-VQFN (9x9)
-40 °C
85 °C
External, Internal
Current Sink
3.6 V
3 V
Texas Instruments
DAC5681ZIRGCT
LVDS - Parallel
10.4 ns
16 bits
Current - Unbuffered
1.9 V
1.7 V
64-VFQFN Exposed Pad
Surface Mount
±2, ±4
64-VQFN (9x9)
-40 °C
85 °C
External, Internal
Current Sink
3.6 V
3 V
Texas Instruments
DAC5681IRGCR
LVDS - Parallel
10.4 ns
16 bits
Current - Unbuffered
2.15 V
1.71 V
64-VFQFN Exposed Pad
Surface Mount
±2, ±4
64-VQFN (9x9)
-40 °C
85 °C
External, Internal
Current Sink
3.6 V
3 V

Key Features

• 16-Bit Digital-to-Analog Converter (DAC)1.0 GSPS Update Rate16-Bit Wideband Input LVDS Data Bus8 Sample Input FIFOOn-Chip Delay Lock LoopHigh Performance73 dBc ACLR WCDMA TM1 at 180 MHzOn Chip 1.2 V ReferenceDifferential Scalable Output: 2 to 20 mAPackage: 64-Pin 9 × 9 mm QFN16-Bit Digital-to-Analog Converter (DAC)1.0 GSPS Update Rate16-Bit Wideband Input LVDS Data Bus8 Sample Input FIFOOn-Chip Delay Lock LoopHigh Performance73 dBc ACLR WCDMA TM1 at 180 MHzOn Chip 1.2 V ReferenceDifferential Scalable Output: 2 to 20 mAPackage: 64-Pin 9 × 9 mm QFN

Description

AI
The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance. The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL. The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance. The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock. The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used. The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL.