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74BCT8373 Series

IEEE Std 1149.1 (JTAG) Boundary-Scan Test Device With Octal D-Type Latches

Manufacturer: Texas Instruments
Link to Manufacturer Page: https://www.ti.com/

Catalog

IEEE Std 1149.1 (JTAG) Boundary-Scan Test Device With Octal D-Type Latches

PartNumber of BitsMounting TypeSupplier Device PackageLogic TypeSupply Voltage [Min]Supply Voltage [Max]Operating Temperature [Max]Operating Temperature [Min]Package / Case [y]Package / Case [x]Package / CasePackage / Case
Texas Instruments
SN74BCT8373ADWRG4
8
Surface Mount
24-SOIC
Scan Test Device with D-Type Latches
4.5 V
5.5 V
70 ░C
0 °C
7.5 mm
0.295 in
24-SOIC
Texas Instruments
SN74BCT8373DW
Texas Instruments
SN74BCT8373DWR
Texas Instruments
SN74BCT8373ANT
8
Through Hole
24-PDIP
Scan Test Device with D-Type Latches
4.5 V
5.5 V
70 ░C
0 °C
24-DIP
0.3 in, 7.62 mm
Texas Instruments
SN74BCT8373ADWR
8
Surface Mount
24-SOIC
Scan Test Device with D-Type Latches
4.5 V
5.5 V
70 ░C
0 °C
7.5 mm
0.295 in
24-SOIC
Texas Instruments
SN74BCT8373ADW
8
Surface Mount
24-SOIC
Scan Test Device with D-Type Latches
4.5 V
5.5 V
70 ░C
0 °C
7.5 mm
0.295 in
24-SOIC

Key Features

Members of the Texas Instruments SCOPETMFamily of Testability ProductsOctal Test-Integrated CircuitsFunctionally Equivalent to 'F373 and 'BCT373 in the Normal-Function ModeCompatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan ArchitectureTest Operation Synchronous to Test Access Port (TAP)Implement Optional Test Reset Signal by Recognizing a Double-High-Level Voltage (10 V) on TMS PinSCOPETMInstruction SetIEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZParallel Signature Analysis at InputsPseudo-Random Pattern Generation From OutputsSample Inputs/Toggle OutputsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)SCOPE is a trademark of Texas Instruments Incorporated.Members of the Texas Instruments SCOPETMFamily of Testability ProductsOctal Test-Integrated CircuitsFunctionally Equivalent to 'F373 and 'BCT373 in the Normal-Function ModeCompatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan ArchitectureTest Operation Synchronous to Test Access Port (TAP)Implement Optional Test Reset Signal by Recognizing a Double-High-Level Voltage (10 V) on TMS PinSCOPETMInstruction SetIEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZParallel Signature Analysis at InputsPseudo-Random Pattern Generation From OutputsSample Inputs/Toggle OutputsPackage Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)SCOPE is a trademark of Texas Instruments Incorporated.

Description

AI
The 'BCT8373A scan test devices with octal D-type latches are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface. In the normal mode, these devices are functionally equivalent to the 'F373 and 'BCT373 octal D-type latches. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETMoctal latches. In the test mode, the normal operation of the SCOPETMoctal latches is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary scan test operations, as described in IEEE Standard 1149.1-1990. Four dedicated test terminals are used to control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry can perform other testing functions such as parallel signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54BCT8373A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT8373A is characterized for operation from 0°C to 70°C. The 'BCT8373A scan test devices with octal D-type latches are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface. In the normal mode, these devices are functionally equivalent to the 'F373 and 'BCT373 octal D-type latches. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETMoctal latches. In the test mode, the normal operation of the SCOPETMoctal latches is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary scan test operations, as described in IEEE Standard 1149.1-1990. Four dedicated test terminals are used to control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry can perform other testing functions such as parallel signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface. The SN54BCT8373A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT8373A is characterized for operation from 0°C to 70°C.